報告_MS_CPO測試與封裝供應鏈_20261008

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Source: Morgan Stanley Research estimates

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M Asia Pacific Insight October 8, 2026 10:16 PM GMT

Greater China Technology Semiconductors

Time to revisit CPO and its testing/packaging supply chain

With the recent correction of Taiwan's CPO supply chain, we think expectations have een reset. It's time to revisit the stocks. Reiterate OW on ASE, upgrade WIN Semi to EW, downgrade FOCI to EW.

PIC (photonic IC) and testing are major gating actors or co-packaged optics:

During S MICON Taiwan, several global semiconductors C Os confirmed that CPO adoption is a matter of time. In our recent AI supply chain tracker, we also indicated that Rubin Ultra NVL576 will use CPO for scale-up connect. However, recently some investors have debated whether PIC supply from TSMC may decrease to 35mn units (vs. our previous forecast of 60mn units), which caused a correction of Taiwan's CPO supply chain over the past month. We think that expectations have been reset and it's time to revisit the stocks.

Testing is still the gating actor or CPO to scale: Our recent supply chain checks suggest that although TSMC's PIC production is still the bottleneck, total O (optical engine) production could still reach c. 60mn in 2026. By assuming a 95% yield rate for TSMC IC/PIC hybrid bond and 30% yield rate in downstream assembly, the available O shipments could still reach 17-18mn, which we think is enough to cover 5k NVL576 equivalent of scale-up switches and 200-250k of spectrum scale-out. The open question for 2027 is how fast it can scale. We think testing is the step that sets that pace - the whole CPO testing process is still not finalized. Within our Greater China Semis coverage, we believe TSMC, AS , Hon Precision, MPI, and AllRing will continue to benefit from this secular trend - we suggest building positions on any pullbacks. WIN Semi and KY C could also benefit from optical demand proliferation and longer testing on AI semis. We therefore upgrade WIN Semi to W.

FAU is becoming crowded; downgrade FOCI to EW: Over the past 12 months the supplier base of FAU (Fiber Array Units) has changed. We count at least 10 companies with CPO FAU products shipping, sampling, or in pilot production. Three of them (Corning, Coherent, and TFC) should have larger roles than FOCI in NVIDIA's CPO programs in Rubin NVL576 generation. We therefore see FOCI's FAU market share as more challenging than a year ago. If FOCI can show design wins and share on Optical IO platforms as adoption widens, we would revisit our rating.

What about opportunities in China? NPO should be mainstream or China's AI computing systems: We expect near-packaged optics (NPO) to become the main optical interconnect in China's AI computing systems from 2027, ahead of CPO. For details, please see Could NPO be the solution rather than CPO?

With this report, Lucas Wang assumes coverage of Allring, FOCI, MPI, Hon Precision, and King uan Electronics.

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Asia - Testing/CPO Stocks: Order of Preference

Ex ibit 2: Asia - Testing/CPO Stocks: Order of Preference

Source: Company data, FactSet, Morgan Stanley Research e = Morgan Stanley Research estimates Note: Current prices as of the market close on October 8, 2026, unless otherwise noted M Asia Pacific Insight

Testing is still the gating factor for CPO to scale

Co-packaged optics (CPO) is now in production. NVIDIA's Quantum-X Photonics InfiniBand switch began shipping around early 2026 and was in customer production deployments by mid-2026. Spectrum-X thernet Photonics entered full production in August 2026. The open question for 2027 is how fast it can scale - and we think testing is the step that sets that pace.

Optical testing today is slow and largely manual, with no common standard, which also makes automation critical for CPO to scale. In current NVIDIA flows, optical testing coverage largely ends at the optical engine (Insertion 3), and the packaged device receives an electrical-only final test. Two insertions are being added: simultaneous optical-electrical final test (Insertion 4) and SLT (system level test). We believe Insertion 2 (wafer-level testing of bonded IC-on-PIC wafers) will remain in the process - it's important to select KGO (known good O ) as earlier as possible.

Hon Precision has the clearest dated exposure through its Insertion 4 handler, an all-new tool that carries a higher ASP than electrical-only final testing. MPI is the earliest local entrant at the optical engine stage (Insertion 3), and Insertion 2 is upside optionality if qualification succeeds. AllRing supplies assembly equipment: its fiber-array coupling tools sit between Insertions 2 and 3, and demand scales with optical engine count. AS executes much of the back-end flow and buys the equipment; it benefits as test content moves from the wafer to the package.

The key debate is timing of scale-up CPO. Switch-only CPO volumes keep test tool counts modest. The step-change in test equipment demand comes when CPO moves into NVLink scale-up, which first appears in Rubin Ultra NVL576 (2H27) and reaches volume with Feynman (2028).

Co-packaged optics

In CPO, 'insertion testing' typically refers to the defined test insertion points throughout the manufacturing flow, specifying where and how optical-related testing is conducted from wafer level through final system integration. The primary objective of these insertion tests is to identify the known-good optical engines (KGO ) prior to integration with SoC/ ASIC. In practice, current CPO manufacturing flows typically include four to five test insertion stages. The associated measurements can be broadly grouped into three domains: photonic integrated circuit (PIC) signals, optical output signals from the optical engine, and system-level electrical and optical signals. However, as CPO technology remains at an early stage of development, TSMC and its OSAT partners are still in the process of defining and standardizing the full insertion-test flow, while concurrently qualifying suitable testing equipment and ecosystem partners.

Why testing is the gate

Testing a PIC means bringing a fiber to an on-chip coupler with sub-micron to few-micron tolerance. The cross-sectional area of a single-mode fiber core is hundreds of times that of a silicon waveguide, so small misalignments produce large jumps in insertion loss. Thermal M Asia Pacific Insight behavior adds a second layer: ring modulators shift resonance with temperature, and the buried oxide layer in SOI wafers conducts heat about 100 times worse than silicon. lectrical probe cards work at tens-of-microns precision; optical alignment is a different regime.

There is no unified test standard for PIC parameters such as insertion loss, polarizationdependent loss, responsiveness, and crosstalk. Connector designs also vary by customer, so this lack of connector standardization makes automation harder because test systems must handle many connector types.The result is that test throughput, test cost, and yield learning now determine how fast CPO capacity can grow, more so than the optical device technology itself.

Insertion framework - from Insertion 1 to Insertion 4 and SLT Insertion 5)

Insertion 1 typically re ers to PIC (Photonic IC) Wa er-Level Testing: The objective is to screen core photonic components such as modulators, photodiodes, and power monitors before downstream processing. Typical test items include optical power, insertion loss, dark current, and basic DC electrical/optical characteristics. This early screening step plays a critical role in removing defective dies upfront, thereby protecting yield and reducing losses in subsequent manufacturing stages.

Insertion 2 typically takes place a ter the COUPE/SoIC stage: This is when electronic IC ( IC) dies are bonded onto the PIC wafer, while testing is still conducted at the wafer level. This stage focuses on electro-optical ( O/O ) performance and the interaction between photonic and electronic components. Key measurements include modulation efficiency, receiver sensitivity, O/O conversion characteristics, and overall link performance. The objective is to verify that the integrated electrical and optical subsystems operate correctly and cohesively before proceeding to further assembly steps.

In insertion 2, COUP stacks the IC on top of the PIC, so a wafer-level tester must contact the IC electrically on one side while aligning fiber to the PIC on the other. Optical coupling at this stage is sensitive to vibration, temperature, and wafer warpage, which should be the hardest process within CPO insertion testing, in our view.

Insertion 3 is per ormed a ter the optical engines are diced individually rom the PIC wa ers: It is typically conducted at the OSAT stage. Before co-packaging with the ASIC, each optical engine undergoes testing to qualify as a KGO . This stage includes high-speed (at-speed) testing such as bit-error-rate (B R), eye-diagram, and jitter analysis, as well as assessments of power consumption, thermal behavior, and wavelength stability. This represents one of the most critical test insertion points, as it shifts defect detection earlier in the manufacturing flow and materially reduces downstream integration risk.

Insertion 4 occurs a ter the optical engine is co-packaged with the ASIC: At that point, a final test is performed on the fully packaged device using both electrical and optical interfaces. Typical test coverage includes electrical functionality, optical link integrity, transmit/receive channel verification, multi-channel consistency, and performance under thermal conditions. This stage closely resembles traditional AT -based final testing, but with added optical complexity.

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SLT is the inal insertion: It evaluates the device under mission-mode, real-world operating conditions. SLT typically involves running realistic traffic patterns, conducting long-duration stress tests, monitoring error rates, and assessing thermal-electrical-optical interactions. The objective is to validate end-system performance, stability, and reliability under actual use conditions.

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Ex ibit 3: CPO Insertion Test Flow

Source: Company data, Morgan Stanley Research (e) estimates

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For MPI, we expect CPO testing to emerge as a key revenue growth driver over the coming years: Leveraging its prior experience in L D applications, MPI has the capability to internally develop optical modules for both PIC wafer-level and die-level testing, alongside electrical signal testing for IC dies. At present, MPI is shipping wafer-level testing equipment for Insertion 2 by partnering with Advantest and die-to-die probers for Insertion 3. The company is also developing several additional CPO-related testing tools, as well as expanding its portfolio of probe cards for IC applications.

Ex ibit 4: MPI's wafer-level testing equipment for insertion 2

Ex ibit 5: Live demo of wafer-level testing equipment

Source: MPI

Source: MPI

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Ex ibit 6: MPI's equipment for insertion 3 (DT650)

Source: MPI

Ex ibit 8: Probe card for EIC die on PIC wafer for wafer-level testing for CPO

Source: Formfactor

Ex ibit 7: Live demo of die-to-die testing equipment

Source: MPI

Ex ibit 9: Wafer-level testing for optical engine

Source: Formfactor M Asia Pacific Insight For Hon Precision, we see CPO as an incremental demand opportunity: As Insertion 1 and Insertion 2 are both conducted at the wafer level, Hon Precision's primary exposure lies in Insertion 4, expected to commence from 2027, as well as in the electric testing performed on Spectrum and Quantum packages. Hon Precision supplies ATC handlers, which operate in conjunction with AT (Automatic Test quipment). The company started shipping ATC handlers for Spectrum and Quantum testing in 2025, and is currently planning to introduce its next-generation handlers for Insertion 4, with shipments expected to begin in 1H27 in preparation for CPO scale-up and mass production.

Ex ibit 10: Hon Precision's solution for CPO

Source: Company data

Allring's CPO products have penetrated the CPO supply chain o NVIDIA or FAUoptical engine coupling and FAU AOI equipment: Its coupling machine pairs a six-axis alignment stage with image recognition for automated FAU-to-chip coupling. This step creates the optical engine that Insertion 3 tests, so coupling yield and throughput directly affect Insertion 3 results. Our latest supply chain checks also suggest that AllRing may have also won the dispensing step after insertion 3, where the optical engine will be mounted onto the CPO package substrate. We expect it to account for 2%, 17%, and 22% of AllRing's total revenue in 2026, 2027, and 2028, respectively. Key focus will be the throughput per tool, which we believe will be the key focus for its customers and the advantage for Allring against its competitors like ADST and MRSI.

Ex ibit 11: Bottom-up analysis for AllRing's revenue

Source: Company data, Morgan Stanley Research (e) estimates

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ASE runs much o the back-end CPO low and buys the test equipment: In the

Quantum-X supply chain, TSMC's COUP integrates the IC and PIC into the optical engine, and AS /SPIL handles back-end packaging, including optical coupling and fiber alignment. For Spectrum-X thernet Photonics, NVIDIA named SPIL as the partner for chip-scale packaging and testing, alongside TSMC, Lumentum, TFC Communication, and Foxconn.

AS plans CPO mass production by the end of 2026, covering optoelectronic integration, packaging, test and system co-design. Its subsidiary USI has acquired a controlling stake in Chengdu-based ugenLight Technologies to expand silicon photonics module capacity. As test content moves from the wafer (Insertions 1-2, run at the foundry) to the engine and package (Insertions 3-5, run at the OSAT), more of the test value accrues to AS as service revenue. Longer testing times and new optical-electrical cells also raise capex intensity for its testing operations.

Ex ibit 12: Fiber to PIC Assembly Solutions

Source: ASE

M Asia Pacific Insight

FAU Is Becoming Crowded

We downgrade FOCI to Equal-weight: FOCI was one of the first suppliers in Taiwan to develop fiber array units (FAUs) for CPO inside TSMC's silicon photonics ecosystem. The stock has been priced as a scarce Taiwanese supplier of a scarce component. However, over the past 12 months the supplier base has changed. We now count at least 10 companies with CPO FAU products shipping, sampling, or in pilot production. Three of them (Corning, Coherent, and TFC) should have larger roles than FOCI in NVIDIA's CPO programs in Rubin NVL576 generation. We therefore see FOCI's FAU market share as more challenging than a year ago when we initiated coverage.

Where we could turn more constructive on FOCI: Our downgrade to qualweight from Overweight is about the switch-CPO FAU market over the next 12-18 months, where FOCI faces larger, better-placed suppliers. However, the longerterm opportunity is optical I/O (OIO), where optical engines and FAUs are copackaged directly with GPUs and other accelerators. OIO should multiply the number of FAUs per system, and FOCI has been preparing for it: it has shown a copackaged optics architecture for multi-chip modules combining an XPU with HBM, and plans to advance MCM/OIO products with customers from 4Q26. Reworkable FAUs also matter more when the package being protected in a GPU rather than a switch. If FOCI can show design wins and share on OIO platforms as adoption widens, we would look to revisit our rating.

What FAU does and why architecture determines key beneficiaries

Traditional FAU is a mature, high-precision iber-array assembly: Fibers are placed into V-grooves on a glass/silicon/quartz substrate, fixed with a cover and adhesive, polished, and then aligned to a PIC or optical engine. It is proven, customizable, and very low-loss, but assembly becomes more difficult as channel count and density rise. Key FAU suppliers for CPO include vendors such as Corning, Coherent, TFC Communication, FOCI, Senko, Browave, Sumitomo lectric, etc.

Coupling method: Grating coupling brings light into the top surface of the PIC; edge coupling brings it in from the side of the die. TSMC's mainstream COUP platform and key customers' (NVIDIA, AMD, Ayar Labs) solutions for the next few years should still stick to grating coupling, because it is easier to achieve mass production. However, Corning's GlassBridge, for example, targets edge coupling.

Fixed vs. detachable: A fixed FAU is bonded permanently; a detachable FAU plugs into a socket on the package, which allows the optical engine to be tested before final assembly and the fiber to be replaced in the field. NVIDIA's Quantum-X CPO scale-out switch used a fixed interface with FAUs sourced almost entirely from TFC, and NVIDIA's Spectrum-X's move to a detachable connector opened second-source positions for other players. This shows how a single architecture change can redistribute share.

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Channel density: CPO roadmaps move from single-row 1D arrays toward multi-row 2D arrays as bandwidth per engine rises. Recent launches show the shift. RAM Photonics and Sumitomo lectric have both shown 2D fiber arrays, and Largan has demonstrated fourlayer stacking. ach step resets the qualification process.

How iber count raises di iculty: Fiber count rises with bandwidth. In a parallel design, each 200G lane needs its own transmit fiber and receive fiber. A 3.2T engine (16 × 200G) therefore needs 32 signal fibers, plus several polarization-maintaining fibers that carry light from external lasers, which is why 3.2T products use FAUs of about 40 channels. A 6.4T engine (32 × 200G) needs 64 signal fibers plus laser fibers, which points to about 80 channels. Fiber count grows roughly in line with bandwidth unless designs use wavelength-division multiplexing (WDM) to carry several lanes on one fiber. At the system level, Corning has said a 51.2T switch may need more than 1,000 fibers.

Ex ibit 13: Corning's FAU/CPO demonstration

Ex ibit 14: FAU demonstration at Computex for Ayar Labs scale-up solution

Source: Corning, Morgan Stanley Research

Source: Wiwynn M Asia Pacific Insight

Ex ibit 15: TFC's FAU

Source: TFC

Ex ibit 16: FOCI's FAU solution for CPO

Source: FOCI

Major players within FAU production

FOCI 3363.TWO): The baseline

Strengths - FOCI was early and reworkable FAU could be critical or OIO: It was named in TSMC's silicon photonics ecosystem partner list and has been developing CPO FAUs with TSMC's COUP platform for several years. Its reflow-compatible, reworkable FAU addresses a CPO problem - i.e., that if an FAU fails after bonding, the whole package can be lost, which is extremely important when OIO is packaged together with XPU.

FOCI's FAU shipments started in 3Q26, and August revenue rose 19.7% MoM. FOCI has said that its silicon photonics customers are mainly chip design houses serving highperformance computing. Its September investor presentation listed several MCM CPO packaging solutions already delivered and design-in plans with more than five other customers, although design-ins are not yet volume orders.

Challenges - scale and pro itability: Its first FAU line mainly serves its first customer, with capacity for others planned for next year. Planned capex of about NT$1.54bn from 2026 to 2Q27 is large for FOCI but small against competitors' expansion plans. When CPO gets into scale, the volume, production, and reliability of FOCI's FAU could also be challenges in fulfilling customers' demand.

TFC 300394.SZ; covered by Andy Meng): The incumbent

Strengths - TFCs' CPO FAU and external laser source products are in stable delivery and it is adding capacity with customers: In September, TFC said it had already prepared ample capacity for customers' volume ramp next year. NVIDIA named TFC in the Spectrum-X Photonics production chain for laser module subassemblies, so it already sits inside NVIDIA's CPO supply chain. Its precision manufacturing base dates back to ceramic ferrules, where it took more than 40% global share.

Challenges - potential geopolitical risk: Recent DC meetings highlight 3.2T as the most likely generation to face restrictions on China-based optical transceivers (see Meta Marshall's report Telecom & Networking quipment: Potential FCC Rules on Optical M Asia Pacific Insight Transceivers More Likely to Come in at 3.2T). Although FAUs are components rather than transceivers, so direct exposure is unclear, US customers have an incentive to qualify nonChinese sources even though TFC has production in Thailand.

Implications or FOCI: The US policy angle is the strongest argument for FOCI as a nonChina second/third source. But the supplier-broadening argument cuts both ways: it creates room for FOCI but equally for Corning, Senko, Coherent, and other entrants from Taiwan.

Corning GLW.N; covered by Meta Marshall): The scale player

Strengths - Corning already designs and manu actures iber harnesses with FAUs or CPO and has delivered CPO-optimized iber, customized FAUs, pre-assembled harnesses and connectors: In May 2026, NVIDIA and Corning announced a multiyear commercial and technology partnership under which Corning will increase US optical connectivity capacity tenfold and build three new plants in North Carolina and Texas. Corning also controls fiber supply.

GlassBridge: GlassBridge, which is made by Corning, forms waveguides inside glass using a wafer-based ion-exchange process and relies on passive alignment. The first product supports chip core pitches of 30µm or more and targets coupling loss below 2dB. Corning is co-developing it with GlobalFoundries as a detachable edge coupler. However, it serves a different coupling ecosystem from NVIDIA's grating-coupled designs, and Corning positions GlassBridge as complementary to FAU-based solutions. We see GlassBridge as a 2028+ risk to the terminal value of grating-coupled FAUs, not a 2027 earnings issue. (see our report Greater China Semiconductors: CPO Supply Chain Updates; More on GlassBridge).

Implications or FOCI: Corning is FOCI's key competitor with the most capacity and the closest NVIDIA relationship. Its expansion is the main reason we think FAU pricing may not support the bull-case margin path for FOCI and might consume most of the FAU TAM FOCI is targeting.

Senko privately held under Senko Group; covered by Takuya Osaka): The detachable-interface specialist

Strengths - detachable FAU solution: NVIDIA named Senko among its CPO collaborators when it launched its photonics switches at GTC 2025. In March 2026, Senko and Lightmatter (private) announced a detachable FAU combining Senko's metallic PIC coupler and optical interface with Lightmatter's expanded-beam technology. Lightmatter reports insertion and reinsertion loss below 1.5dB and says the design is compatible with moldand-grind packaging, as demonstrated in AS 's flows. Because the interface uses passive expanded-beam alignment, it removes the need for active fiber alignment during assembly. Senko has also presented a detachable FAU with repeatability under 0.15d, supported by BizLink.

Challenges - detachable FAUs are still early in adoption and cover plate on FAU design is di erent rom NVIDIA: Senko's FAU's cover plate design (S AT™; which is used to align with the receptacle on PIC) is different from NVIDIA's design, which might not be able to ship to NVIDIA for the time being, in our view. Our industry checks suggest that Senko's design of the alignment for both cover plate on FAU and receptacle on PIC is different M Asia Pacific Insight from Nvidia's, which requires a patent. The company has not commented. We believe that if Senko sticks to its own design/patent and would not be willing to accommodate Nvidia's, it might not be the major supplier of Nvidia's FAU.

Implications or FOCI: FOCI's reworkable ReLFACon competes directly with Senko's detachable approach. If detachable connectors become standard across CPO roadmap, Senko's head start and partnerships would be a direct threat to FOCI's differentiation, we believe.

Coherent COHR.N; covered by Meta Marshall): The vertical integrator

Strengths - ability to provide the total solution rather than FAU itsel : Coherent's 2026 OFC investor presentation included FAUs, prism microlens arrays, CPO and NPO modules, and external and continuous-wave lasers within its CPO product range. It can bundle the FAU with the laser and optical engine. NVIDIA announced a multiyear strategic partnership with Coherent in March 2026, alongside one with Lumentum.

Implications or FOCI: Our checks suggest that Coherent could be one of the key FAU (or total solution/fiber kit) suppliers to NVIDIA for Rubin NVL576. If that's the case, it could pressure FOCI;s market share before the OIO generation is released.

Largan 3008.TW; covered by Andy Meng): The precision entrant

Strengths - high precision and ability to expand capacity: Largan says it can combine lower-precision, purchased V-grooves and standard fiber into a finished FA with accuracy below 0.3µm, against 0.5-0.8µm for most products on the market. It has shown fourlayer stacked arrays, which matter for future multi-row designs. In July it confirmed its first order from a customer seeking mass production, with samples sent that month, a pilot line is due by end-3Q26, and volume production as early as mid-2027. It has also spent about NT$8.1bn on land and buildings since June, partly for CPO, and its automated equipment is designed in-house.

Challenges - still relatively new to FAU: In April, Largan management said FAU samples had not yet met loss targets and that building a production line would take one to two years. The timeline has since shortened, but the company still expects six months to a year between pilot and volume production, subject to customer certification. Its chairman has also said Largan may only make FA and micro lens arrays (MLA) rather than full FAUs, and that customer specifications remain single-row for now, with multi-row demand possibly three to four years out.

Implications or FOCI: Although Largan targets FA and MLA for the time being rather than the whole FAU, we still see the possibility for Largan to ship the whole FAU in future. Also, we don't rule out the possibility of Largan collaboratinge with other FAU suppliers, which may have further impact on FOCI's potential market share if that were to occur.

Sumitomo Electric 5802.T; covered bu Yu Shirakawa): The high-density specialist

Strengths - Sumitomo Electric was named in NVIDIA's GTC 2025 silicon photonics ecosystem with strong design capability: It has developed a 90-degree-bent twodimensional fiber array for CPO switches, the 2D-FlexBeamGuid , which arranges 72 single-mode fibers in a 6×12 grid. The company reports a height of 5.5mm, density of 24

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fibers per mm and insertion loss below 0.5dB, with polarization-maintaining performance above 20dB. That design targets the multi-row, high-density FAUs that next-generation CPO will need. Sumitomo also makes optical fiber, connectors and semiconductor lasers, including high-power laser sources for CPO, so it can supply several parts of the optical path. Its optical device production is in Japan and Vietnam, which keeps it outside the scope of US measures aimed at Chinese suppliers.

Implications or FOCI: Sumitomo is a credible (in terms of the current quality and capacity) non-China source for the next-generation 80- and 100-channel, multi-row sockets FOCI is seeking for its 2027-28 growth. FOCI's channel-count roadmap is therefore entering a field where at least one established supplier has already shown a 72fiber 2D design.

BizLink 3665.TW; covered by Derrick Yang): The system-level interconnect player

Strengths - System-level integration and collaboration with FAU/HPC vendors. BizLink completed its acquisition of Shenzhen-based Shin Fu Sheng in January 2026, adding fiber patch cords, MPO/MTP connectors and FAU technology, targeting 20- and 42-channel CPO FAUs. It is expanding fiber assembly capacity several times over in China and Taiwan. It also has partnered with S NKO and other ASIC vendors to provide the FAU alignment process for the CPO architecture.

Challenges - mass production experience: Though Bizlink has developed some optical alignment capability internally in the past few years, it does not have experience in mass production as of now, which could hinder it in bidding for more projects.

Implications or FOCI: BizLink can work with FAU vendors or chip vendors for the FAU alignment, so there is some room for cooperation between Bizlink and FOCI.

Other entrants

Browave 3163.TWO; not covered): FOCI's closest Taiwanese peer, already in NVIDIA's ecosystem

Browave was one o the 11 companies NVIDIA named in its silicon photonics ecosystem at GTC 2025 - alongside TFC, Senko, Corning, and Sumitomo lectric. Its CPO products focus on optical I/O: FAUs, fiber harnesses and fiber distribution (shuffle) boxes. Browave has production experience in planar lightwave circuit (PLC) fiber arrays and WDM microoptics, including lens arrays, and co-designs with customers. Its CPO timeline calls for small-volume production in 3Q26, monthly volume in the thousands in 4Q26, and tens of thousands a month in 1Q27 if customer schedules hold. Browave plans to expand its Philippine plant two- to threefold, supported by its plant in Zhongshan, China.

Focused on shu le boxes: Management has clarified that the thousands and tens-ofthousands volume targets refer mainly to shuffle modules rather than precision FAUs. Its MMC connector line depends on licensing from US Conec, and it buys its connectors from third parties. Part of its production sits in China.

Implication for FOCI: Browave competes for the same "Taiwan, non-China" position FOCI relies on, with NVIDIA ecosystem membership and a profitable base business to fund it.

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Ability Opto 3362.TWO; not covered)

This company is aiming for volume production in 2027 and a target of about 30% of revenue from the product line. HST (private; non-covered) combines metalenses, mirrors and 2D FAUs into a pluggable multi-row product; its first line in Zhunan is planned at 200,000 sets a year, with trial production in 4Q26 and a target of 2028 scale-up CPO. Outside Taiwan, RAM Photonics (private) says its 2D fiber array has entered mass production with an architecture that scales to more than 1,024 fiber ports. Most of these are pre-revenue in CPO FAUs, but together they show how many suppliers will be competing for 6.4T and multi-row sockets.

Ex ibit 17: FAU - Competitive landscape

Source: Company Data, Morgan Stanley Research

What crowding does to FOCI's numbers

For 2026, we expect Spectrum-X to be the mainstream scale-out CPO switch product, with the optical engine production number being 800k-1mn units, and total switch shipments being ~25-30k units given production lead time. We now expect Corning, Coherent, and TFC to be the major FAU suppliers, with FOCI taking 5-15% of total market share (vs. our previous assumption of 35%). Thus, we expect NVIDIA's contribution to FOCI's total revenue to be around 12% in 2026

Looking to 2027, our industry checks suggest that NVIDIA could introduce a CPO version of the NVL576 architecture, with the launch time likely in 2H27. As a result, we assume 5k and 20k units of CPO Rubin Ultra rack shipments in 2027 and 2028, respectively, with FOCI having 5-15% market share. Thus, we expect NVIDIA's total revenue to contribute around 82% and 90% of FOCI's total revenue in 2027 and 2028, respectively.

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Downgrade FOCI from OW to EW

Our downgrade mostly reflects the competitive landscape and the capability for FOCI to expand the capacity as soon and as much as possible to meet customers' demand. This is also the main reason why we expect FOCI's market share to drop from 15% in 2026 to 8% in 2028 - the demand is growing so fast that our expected O shipments from TSMC are growing from <500k units in 2026 to >70mn units in 2028. However, we believe FOCI will find it hard for capacity to catch up the demand growth - its capacity and production scale aren't comparable to other peers like Corning, TFC, or even Largan, etc.

We acknowledge FOCI's design capability, patent, and cooperation with TSMC which is the leader, in building the CPO ecosystem with its COUP technology. However, when customers are desperate for CPO to scale and have components ready, we believe the automation and scale of FAU's capacity will also play an important role in market share.

We see potential for FOCI to announce another fundraising by the end of this year or early 2027 to expand capacity further after its recent small FAU production sample passed customers' qualification. Also, the production line for FAU could also be fully automated by end-2026 and running 24/7.

Where we could be wrong with our EW call

1. Capacity expansion: We expect O shipments from TSMC to growing from <500k units in 2026 to >70mn units in 2028. We therefore expect almost all of the major FAU suppliers to expand capacity, including FOCI. The upside/downside surprise would be the pace of FOCI's capacity expansion.

2. Collaboration with other FAU suppliers: We don't rule out the possibility of FOCI collaboring with other total solutions providers like Corning, Coherent, etc. in future to provide FAUs or part of the FAU components.

3. More customers rather than just Nvidia: There are still multiple customers (probably more than 10) doing prototypes with potential to recognize NR revenue in 2026, with mass production likely starting in 2027 or 2028, according to our supply chain checks. We haven't fully baked this into our FOCI model, and view it as only a bull case scenario as we await additional product launch and shipment signs in the supply chain. However, again, we think the capacity and automation would constrain FOCI's FAU shipments in the near term.

We raise our inal OE shipment assumptions

We raise our final O shipment forecasts from 7mn in 2027 and 48mn in 2028 to 17mn and 73mn, respectively. Although we lower our assumption for TSMC's average capacity in both years, we raise the SoIC (hybrid bond of IC/PIC) utilization rate assumption to 95% because we have seen strong improvement from TSMC in the past year. Also, since the downstream assembly yield rate is already at 20-30% currently, we believe it's not too demanding to improve to 30% on average in 2027.

For this 17mn O in 2027, we believe it's enough to support at least 5k equivalent of Rubin Ultra NVL576 server racks by assuming 2304 scale-up O (18 switch trays per NVL72; four switches per tray; four O per switch) and 768 scale-out O (three switches per NVL72; 32 O per switch) per rack.

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Ex ibit 18: Our new OE assumptions from TSMC PIC output

Source: Morgan Stanley Research estimates

Ex ibit 19: Our previous OE assumptions from TSMC PIC output

Source: Morgan Stanley Research estimates

We also raise our ASP assumptions for FOCI 3.2T and 6.4T FAU to US$100 and US$220 from US$90 and US$180. However, we lower our market share assumptions for FOCI from 35% to 8-10% for 2027-2028.

Ex ibit 20: Bottom-up analysis: NVIDIA's revenue contribution to FOCI in 2026-28e

Source: Company data, Morgan Stanley Research (e) estimates M Asia Pacific Insight Source: NVIDIA

Ex ibit 21: Spectrum-X CPO Switch

Ex ibit 22: Quantum-X CPO Switch

Source: NVIDIA

When we could turn more constructive on FOCI: Our qual-weight rating reflects our view on switch-CPO FAUs between now and 2027, where we think FOCI's share and margins will come under pressure. We note that optical I/O is a different and potentially larger opportunity, and any positive signs on this could lead us to revisit our rating.

Why could FOCI be better placed in OIO than in switches? FOCI was positioned early. At its November 2025 investor conference it showed a co-packaged optics architecture for multi-chip modules combining an XPU with HBM, and it lists MCM/OIO co-packaged optics among products advancing with customers from 4Q26.

Reworkability also carries more weight in OIO. A failed fiber interface on a GPU package destroys far more value than one on a switch package. FOCI's reflow-compatible, reworkable ReLFACon design addresses that risk directly, so it may count for more with accelerator customers than with switch customers.

For Optical I/O or optical engine on interposer adoption plans, we see NVIDIA exploring multiple solutions for the next-generation Feyman and Feyman Ultra's platform, but whether this is introduced or not will still take time. For other solutions, we see AMD targeting a scale-up CPO version for its MI550 or MI650 rack system in 2027/2028, based on its development progress. We also see ASIC vendors exploring CPO on GPU.

FOCI's plans for capacity

In its public offering disclosure early this year for the S O, FOCI disclosed its projected revenue and profitability for the NT$1.538bn in capex. The company completed its S O plan in early February, with total acquired capital of NT$3.1bn. However, we believe the capacity is far from enough to meet the whole industry demand. We therefore see potential for FOCI to announce another fund raising by the end of this year or early 2027 to expand capacity further after the recent small FAU production sample passed customers' qualification.

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Ex ibit 23: FOCI's projected revenue and profitability from NT$1 538bn in capex

Source: Company data, Morgan Stanley Research

Ex ibit 24: FOCI's SiPh Roadmap

Source: FOCI

Ex ibit 25: FOCI's solutions for CPO

Source: FOCI

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Ex ibit 26: ReLFACon enables direct transmission of external photonic signals with MCM modules to achieve reliable signal transmission

Source: FOCI

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What a out China? Could NPO e the solution rather than CPO?

We expect near-packaged optics (NPO) to become the main optical interconnect in China's AI computing systems from 2027, ahead of co-packaged optics (CPO). Copper will keep the shortest links inside a server tray, and pluggable optics will remain in scale-out networks. For the scale-up links that join thousands of accelerators into one system, we think NPO is the option China can build, standardize, and maintain with its own supply chain.

The case rests on China's constraints. Domestic AI chips are weaker per chip than NVIDIA's, so Chinese system makers build much larger scale-up domains to compensate. Huawei's Atlas 960 SuperPoD connects up to 4,096 NPUs in one system, against 72 or 144 GPUs in an NVIDIA rack. Domains that span dozens of cabinets are beyond copper's reach and must be optical. CPO, the other highdensity optical option, depends on TSMC's co-packaging processes, which Chinese AI chipmakers cannot use. NPO keeps the optical engine as a separate, replaceable part on the board a few centimeters from the chip, so the chip can use domestic packaging and the engine can come from domestic optical suppliers.

Four ways to connect accelerators

AI systems connect accelerators in two layers. Scale-out networks link servers and racks through switches, usually with pluggable optical modules. Scale-up networks link accelerators into a single high-bandwidth domain so they can share memory and act as one machine. Scale-up is where the copper-versus-optics decision is being made.

Copper: lectrical links over cables or backplanes. Copper is cheap, reliable and lowlatency, but its reach falls as lane rates rise; at 200G per lane, links are limited to a few meters. Copper-based AI racks have to pack computing extremely tightly to stay within reach, which creates manufacturing, power-density and cooling problems, and copper cannot cover scale-up domains of more than about a 100 accelerators.

Pluggable optics, including LPO: Modules plug into the front panel of a switch or server. Conventional modules contain a DSP that re-times the signal; linear-drive pluggable optics (LPO) remove the DSP to cut power and latency. Huawei's current Atlas 950 SuperPoD uses LPO.

NPO: The optical engine moves off the front panel onto the main board, a few centimeters from the switch or computing chip, and plugs into a socket. Huawei's Hi-ON leaves about 5cm of copper between the computing package and the optics. Alibaba's module uses a standard LGA connector, so the engine can be tested on its own, screened for yield and replaced in the field.

CPO: The optical engine sits inside the chip package. CPO gives the best power and density, but the engine and the chip share a package, so yields are combined and a failed engine is hard to replace. NVIDIA's Spectrum-X Photonics switches, now in production, are M Asia Pacific Insight built on TSMC's COUP process with SoIC stacking.

Ex ibit 27: CPO evolution progress

Source: ASE

We compare copper-based interconnects, pluggable optical transceivers, near-package optics (NPO), and co-packaged optics (CPO) in xhibit 28. Copper is the mainstream option for short-reach scale-up connectivity, with passive cables offering low cost, low power consumption, and very low latency, while limited transmission distance constrains broader deployment.

Pluggable optical transceivers are the mainstream solution for scale-out networks, combining longer reach and straightforward maintenance with higher power consumption and signal latency.

NPO and CPO are emerging as alternatives for both applications, combining shorter electrical links and higher density with lower power consumption than the pluggable modules shown. NPO occupies an intermediate position, balancing higher lane speeds and density with relatively accessible maintenance. CPO offers the highest stated lane speeds and interconnection density, alongside the shortest electrical links, although its cost and maintenance requirements present greater challenges.

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Ex ibit 28: Comparison of Copper and Optical Interconnect Architectures

Source: Morgan Stanley Research

Why China is different

Weaker chips force larger scale-up domains

Huawei's Ascend 960DT offers roughly half the FP8 computing and a third of the FP4 computing of NVIDIA's B300, which NVIDIA cannot sell in China. Chinese system makers compensate for the lack of computing by connecting more chips. Huawei's Atlas 960 holds up to 4,096 NPUs in one SuperPoD. Huawei's simulation claims that a 100,000-NPU cluster built from 4,096-NPU SuperPoDs achieves 2.75 times the model FLOPs utilization of a cluster built from 8-NPU servers, because cross-server communication otherwise takes up more than 40% of training time. A 4,096-chip domain spread across dozens of cabinets cannot be wired with copper, so optics are a requirement for China's system design.

Weaker SerDes favor a shorter electrical path

LPO would work better when bandwidth needs are moderate and the host chip's SerDes are strong, while NPO is more suitable when bandwidth density is high or the chip's SerDes are not strong enough. Alibaba also says NPO lowers the SerDes performance required of the main chip compared with LPO. Chinese accelerators and switch chips are M Asia Pacific Insight built on less advanced processes than their US counterparts, so a shorter electrical channel directly eases one of their design limits.

CPO depends on packaging China cannot access

Production CPO today relies on TSMC's COUP optical engine process and advanced 3D stacking. Chinese AI chipmakers cannot use TSMC for advanced AI chips. NPO separates the optical engine from the ASIC package, so the ASIC can use domestic 2.5D packaging and the engine can be built on mature 2D processes. Alibaba's 3.2T NPO module, for example, flip-chips two 16-channel silicon photonics chips and linear driver/TIA chips onto an mSAP substrate using mature 2D packaging.

Serviceability matters more in very large systems

A 4,096-NPU system contains thousands of optical links. With CPO, a failed engine can take a switch or accelerator package out of service. With NPO, the engine can be swapped. Huawei says its Hi-ON design doubles fault-free operating time and lifts system availability to 99.8% compared with a pluggable-based design. Alibaba says its NPO switch supports module-level hot swapping, so a failure affects the smallest possible unit. Alibaba's team describes long-term stability and failure rates as the deciding factor for whether all-optical scale-up can be deployed at scale.

Who is deploying NPO?

Huawei: from LPO in the Atlas 950 to NPO in the Atlas 960E

Huawei's current Atlas 950 SuperPoD, shown at WAIC 2026, connects the 8 NPUs within each computing tray electrically, around 4,096 800G optical transceivers in the 1,024NPU system on display, about four per NPU, and described it as the first SuperPoD to use LPO, based on Huawei's 100G VCS L technology.

The Atlas 960 moves to NPO. Huawei's Hi-ON engine carries 7.2 Tb/s with a built-in light source and is, according to Huawei, the first NPO engine with an integrated light source to reach mass production. It integrates 36 transceiver channels and uses linear direct drive with no oDSP, which Huawei says cuts latency by about 90% and power use by about 66% against a conventional pluggable. Huawei says 5,500 Hi-ON engines replace the 48,000 800G modules a conventional design would need, cutting system power by more than 550kW. The bandwidth matches: 5,500 × 7.2 Tb/s is 39.6 Pb/s, against 38.4 Pb/s for 48,000 × 800G. The air-cooled version is due in 2Q27 and the liquid-cooled version in 3Q27, with the Ascend 960DT chip pulled forward to 1Q27.

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Ex ibit 29: Huawei Ascend 950 SuperPod with a scale-up range to 8,192 chips

Source: Huawei

Ex ibit 30: Ascend 950 SuperPod still adpots 800G optical transceivers

Source: Huawei

Alibaba Cloud: NPO as the core of all-optical scale-up

Alibaba connects 512 accelerators through a single-layer CLOS network of optical links and eliminates high-speed copper inside the rack. Alibaba names LPO and NPO as the preferred optical options and says they reduce optical cost by 30-40%.

Alibaba has since powered up a 3.2T NPO module in the OIF package format, measuring 22.5mm × 35.1mm. It reports typical power of about 20W, a TD CQ (Transmitter and Dispersion ye Closure Quaternary) of 1.9dB and compliance with the I (Institute of lectrical and lectronics ngineers) 802.3bs DR4, so it can inter-operate with conventional DSP-based modules. The module is deployed in a switch built on four domestic 25.6T switch chips, giving 102.4T of capacity with a path to 409.6T. The switch has passed power-on and functional validation and is in long-term reliability testing. Alibaba is also working with other internet companies to set a 6.4T standard (UPO) through the ODCC (Open Data Center Committee).

At APSARA 2026, Alibaba introduced its NPO scale-up solution called AL64, which it said could link up to 1,024 NPUs through NPO networking.

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Ex ibit 31: Panjiu AL64 adopts NPO to conduct scale-up networking

Source: Alibaba Source: Alibaba This report references U.S. Executive Order 14105 and/or entities that may be in scope of such order. U.S. persons may be prohibited from en a in in certain transactions or otherwise require certain other transactions be notified to the U.S. Department of Treasury. Readers are solely responsible for ensurin that their investment or trade activities are carried out in compliance with applicable laws.

Ex ibit 32: Alibaba showcased its NPO solutions at APSARA 2026

This report references export controls and/or entities that may be subject to export control restrictions. Readers are solely responsible for ensurin that their investment or trade activities are carried out in compliance with applicable laws.

M Asia Pacific Insight

Glo al Implications

Greater China Semiconductors covered by Charlie Chan)

ASE LEAP revenue may reach US$9bn in 2027 higher than the company's latest guidance of >US$7.5bn)

Our bottom-up analysis suggests that AS 's L AP revenue is likely to reach US$9bn in 2027, given strong demand from both oS (on substrate) outsourcing, CPU CoWoS needs, and new CPO demand, higher than company guidance of >US$7.5bn. The demand is mostly from oS outsourcing from TSMC. While AS remains the major oS supplier to NVIDIA GPU, our checks also indicate that the majority of Google TPU and AMD MI400 series is likely to be outsourced to AS , given TSMC's clean-room limitations. We think the dollar content per chip for oS at AS could range from US$100 to US$250 in 2026, depending on the material cost, chip size, and margin of each product. Our assumption of the oS outsourcing percentage from TSMC of major products is - NVIDIA almost 100%, TPU 70-90%, MI400 80%.

Meanwhile, our channel checks suggest that AMD's Venice CPU could go for full CoWoSlike packaging at AS Group (both AS and SPIL). The initial allocation could be more at SPIL given SPIL's better production capability. Then, the allocation could reach 50:50 between SPIL and AS . By assuming US$8k per CoWoS wafer cost at AS by comparing the pricing to TSMC CoWoS and that the chip per CoWoS wafer could be around 25-26 chips for Venice CPU, we expect the dollar content per Venice CPU to be slightly above US $300.

For CPO, we also expect AS to play a significant role in both packaging and testing. The whole process may include testing from insertion 3, insertion 4, SLT, optical engine mounted on the substrate, FAU attachment, etc. We assume the dollar content for the packaging could be around US$30 per O and could be more than double if it includes the testing process.

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Ex ibit 33: Further breakdown of our ASE LEAP revenue forecasts

Source: Company data, Morgan Stanley Research e = Morgan Stanley Research estimates

Ex ibit 34: ASE LEAP revenue breakdown by customers

Source: Morgan Stanley Research e = Morgan Stanley Research estimates

KYEC also benefits from strong GPU/TPU/CPU demand

In our earlier GUC report, we mentioned that demand for Google CPUs is very strong. We now forecast Google CPU shipments of 1.2-1.3mn units this year and around 4mn units in 2027 with around 3mn units of Axion2 and 1mn units of Axion3. Per our published forecast, the Axion3 FT time could also double from Axion2 to around 600 seconds given two computing dies and larger chip size.

Our checks also indicate that this Google CPU requests burn-in and SLT (system-level testing), which we believe could generate 1-2% of KY C 2026 revenue and 5-10% of 2027e. To sum up, we now forecast that Google-related demand could account for 10-15%

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of KY C's 2027 total revenue, including TPU, CPU, FT, and part of the CP.

Although our checks suggest that R-series XPU final test time might ramp from 800-900 seconds, not much higher than the prior generation, the test still may recover when KY C has more capacity. We also break down the CPU demand from the major customer, including G-series and V-Series CPU. We expect sharp testing time improvement from c. 300 seconds to c. 700 seconds - CPU design and chip size are both getting more complicated as generation/geometry migrates for heavier AI inferencing and orchestration workload. Those CPUs also require burn-in for better performance.

Overall, we expect that B-series XPU could maintain momentum in 3Q26 despite the ramp-up of R-series. Combined with new products like 3nm TPU and 2nm smartphone SoC from MediaTek, we forecast revenue growth for KY C of 10-15% QoQ in 4Q26. Overall revenue from the largest customer should be more than 40% of KY C's total revenue in 2026. Overall, we forecast AI-related offerings to still contribute 25-30% to KY C's revenue in 2025, >35% in 2026, and >45% in 2027 (including TPU and chip probing).

Ex ibit 35: KYEC: Testing revenue (excluding wafer sort) from major customers

Source: Company data, Morgan Stanley Research e = Morgan Stanley Research estimates

WIN Semi could benefit from PD growth and potential outsource of the LD by late 2027; upgrade from UW to EW

In our previous WIN Semi report, we noted that Lumentum (LIT .O, covered by Meta Marshall) is unlikely to outsource CW lasers or ML to WIN Semi, which was the main thesis for our UW rating. However, our recent checks suggest that WIN Semi and its largest customer (Broadcom) have secured InP substrate and could show substantial growth for the PD (photo diode) business in 2H26, which could account for >10% of WIN Semi's total revenue. Our recent checks also suggest that Broadcom could outsource LD

M Asia Pacific Insight

(laser diode) production to WIN Semi given insufficient internal capacity. Our checks indicate that Broadcom could be one of the top four suppliers for Nvidia's CPO laser diode (Lumentum and Coherent are two of the others).

We also see WIN Semi with even stronger revenue growth from its aerospace business into 2027, especially from the ground station and satellite business. With SpaceX's (SPCX; covered by Adam Jonas) launch of its Starship and Starlink V3 satellite, we expect the content value per satellite for WIN Semi to increase largely from Starlink v2 to v3, as well as future DTD (direct to device) satellites. The content improvement comes not just only from the RF chips volume increase, but also the material migration from GaAs to GaN, of which the 4-inch GaN ASP could be US$9k from our industry checks (vs. 6-inch GaAs of around US$2.5-3k). We therefore upgrade from UW to W.

Where we could be wrong with our WIN Semi EW call: We think the largest swing factor for WIN Semi in the near term would be the aerospace business, which we think is relatively hard to track given the satellite launch could always come with certain possibility of a delay or failure. However, on September 28, 2026, SpaceX successfully launched the Starship with Starlink V3 satellite. If SpaceX decides to speed up the satellite constellation, there also might be upside to our forecast.

Ex ibit 36: WIN Semi's Aerospace revenue projection

Source: Morgan Stanley Research estimates M Asia Pacific Insight Source: Company data, Morgan Stanley Research e = Morgan Stanley Research estimates

Ex ibit 37: Projection of SpaceX's Numbers of Satellite

Greater China Hardware covered by Derrick Yang)

Chroma 2360.TW): Multiple drivers from the AI-related testing and metrology market

Dominant in GPU SLT and stepping into FT handlers

Chroma has been the dominant supplier of SLT tools in the HPC market. It has been the sole supplier to NVIDIA's GPUs, and it is seeing more interest from HPC vendors in SLT for their CPU and accelerators.

Besides expanding demand for GPU and accelerators in AI deployment, Chroma's SLT business should also benefit from ever-increasing power density from those advanced chips as the test equipment specs also need to be upgraded. We estimate that the SLT business will account for ~20% of Chroma's total revenue in 2026.

In the HPC testing market, Chroma used to focus more on SLT, but it has decided to leverage its existing expertise and customer relationships to penetrate the final test handler market, which we believe represents an even bigger market opportunity than SLT. Moreover, it will penetrate the market for burn-in ovens for HPC in the coming quarters.

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Ex ibit 38: SLT and FT equipment offerings from Chroma

Source: Chroma

Fast-growing metrology business amid advanced packaging capacity expansion

In 2025, Chroma started to supply metrology equipment that is used in the probe mark, RDL and TSV structures in the advanced packaging process, with its customer base including foundry and OSAT players.

Chroma's metrology equipment employs white light interferometry technology. The basic working principle is to have white light emitted on the reference mirror and the sample, which is placed at the same distance from the light source. The reflected beams from the reference mirror and sample surface are then received by a light sensor.

Interference occurs when two light beams collide, which could cause them to either strengthen or weaken, depending on the phase of the two light beams. Thus, by measuring the intensity of the combined light beams, the distance between the light sensor and multiple points on the target surface can be calculated through an algorithm. This can then be used to measure the dimensions of the structure or the alignment of layers.

This business should continue to grow along with the capacity expansion for different advanced packaging architectures, e.g., CoWoS, wafer-level multi-chip module (WMCM), CoPoS. We estimate that metrology will account for mid single digit % of Chroma's total revenue in 2026.

M Asia Pacific Insight

Ex ibit 39: Concept of light interference

Source: Keyence

Ex ibit 40: Setup of interferometer

Source: Wikipedia

Ex ibit 41:

Metrology equipment offerings from Chroma

Advanced Packaging – 2D/3D Wafer Metrology Systems

Chroma

Source: Chroma

Emerging contribution from CPO testing equipment

For CPO testing equipment, Chroma can leverage its accumulated experience and technology in electrical IC and photonics IC testing. It has already been qualified for insertion 3 and insertion 4o testing tools. We think Chroma should ship some tools in 2H26 for the pilot line and it has already received the first batch of orders for the MP line for shipment in 2027.

We estimate that photonics testing equipment will account for 7% of its total revenue in 2026, and the contribution could be higher if CPO continues to penetrate more data center interconnects.

M Asia Pacific Insight

Ex ibit 42: CPO testing equipment offerings from Chroma

CPO Test Solutions

Source: Chroma

Greater China Hardware covered by Andy Meng)

Largan 3008.TW): CPO/FAU opportunity continues to progress

We remain positive on Largan's CPO/FAU opportunity given the company's strong track record in high-precision manufacturing relative to most Taiwanese peers. For our FAU assumptions, we assume an ASP of US$100 and expect Largan's market share to increase from 5% in 2027 to 40% in 2028, with net margins of 10% and 30%, respectively. This implies FAU earnings contribution of approximately US$4mn in 2027 and US$579mn in 2028. In its recent 3Q26 results call, Largan indicated that its first FA project has passed customer verification and that it is expanding from FA into FAU, including coupling and potential FAU-to-carrier assembly, with a dedicated new facility expected to support mass production from around mid-2027, reinforcing our long-term positive view on the company's FAU/CPO opportunities.

Genius 3406.TW): CPO/FAU component opportunity

We expect Genius to participate primarily in FAU components rather than the overall FAU solutions. Accordingly, we assume that its addressable component TAM represents approximately 15% of total FAU TAM. We assume Genius's market share increases from 5% in 2027 to 30% in 2028, with net margins of 10% and 25%, respectively, implying FAU component earnings contribution of approximately US$1mn in 2027 and US$54mn in 2028.

Japan - Semiconductors covered by Suzune Tamura)

Advantest 6857.T): ATE growth to outpace the broader SPE market; reiterating Top Pick and OW

Advantest has expressed confidence in its strong positioning in CPO testing. The company expects its CPO-related revenue to double in 2027 and more than double again in 2028.

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Its competitor Teradyne (covered by Shane Brett) expects the CPO-related tester TAM to grow from $100mn in 2026 to $300-700mn in 2028, and further to $1bn by 2030, as CPO adoption broadens across scale-up applications in AI computing clusters. Based on Advantest's outlook as of the June quarter, the SoC tester TAM is expected to reach around $11bn in 2026, suggesting that the CPO tester market remains relatively small for now. ven without CPO, we believe the AT market can outgrow the broader SP market over the next few years, supported by increasing volumes of AI ASICs and CPUs, as well as higher test intensity across GPUs, ASICs and CPUs. Once scale-up demand ramps, we expect CPO to emerge as the next growth driver for AT demand.

Advantest's V93000 has a very large installed base across foundries and OSATs. We believe Advantest's competitive advantage lies in the ability of customers and the broader supply-chain ecosystem to extend the existing V93k platform to CPO testing. Fabless customers are already familiar with the V93k platform, including functionality, programming environment and workflows, whereas adopting a different platform would require them to develop entirely new test programs. From a production-site perspective, investment risk can also be reduced by deploying CPO testing capabilities on the existing V93k platform, as customers retain the flexibility to repurpose the platform for testing other devices if needed.

M Asia Pacific Insight

Allring: Estimate Revisions and Quarterly Financials

We li t our EPS estimates 21% or 2026, 21% or 2027, and 27% or 2028: Our 2026 revenue and PS estimate changes mostly reflect better-than-expected 2Q26 performance and non-op gain. We lift our 2027 and 2028 revenue estimates to reflect ongoing advanced packaging capacity opportunities, including oS capacity expansion for Xintec (3374.TWO; Not Covered), for which we now expect 10kwpm by 2027 and 40kwpm by 2028. We expect the content value per kwpm of oS build could be similar to TSMC of NT$130mn given the same equipment used. Besides, we also bake in some contribution from a US customer, which could start in 2027.

Ex ibit 43: AllRing: Estimate revisions

Source: Morgan Stanley Research (e) estimates

Ex ibit 44: AllRing: Quarterly financials

Source: Company data, Morgan Stanley Research (E) estimates

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AllRing: Valuation Methodology

We raise our RI-based price target (base case scenario value) rom NT$1,580 to NT $2,000, reflecting our estimate changes for 2027 and 2028. Our key assumptions are unchanged, including a cost of equity (Co ) at 8%, derived from a risk-free rate of 2.0%, beta of 1.0 and market risk premium of 6%; intermediate growth rate of 16%; and terminal growth rate of 4.5%.

Ex ibit 45: AllRing: RI model

Source: Company data, Morgan Stanley Research (E) estimates

Ex ibit 46: AllRing: NTM P/E

Source: Company data, FactSet, Morgan Stanley Research estimates

M Asia Pacific Insight

Risk Reward - AllRing Tech Co. (6187.TWO) Risk Reward - AllRing Tech Co. (6187.TWO)

CPO, SoIC, and CoPoS Help to Extend Revenue Momentum; OW

NT$2,000.00 PRICE TARGET

Base case, residual income model. Our key assumptions are:

• Cost of equity (CoE) of 8%, derived from a risk-free rate of 2.0%, beta of 1.0, and a market risk premium of 6.0%.
• Intermediate growth rate of 16%.
• Cash dividend payout of 65%
• Terminal growth rate of 4.5%.

Consensus Price Target Distribution

Source: Refinitiv, Morgan Stanley Research

RISK REWARD CHART

Key: Historical Stock Performance Current Stock Price Price Target

Source: Refinitiv, Morgan Stanley Research

BULL CASE

BASE CASE

OVERWEIGHT THESIS

• ▪NVIDIA's next-generation GPU Rubin will stick with graphene for heat sink attachment, reducing concerns about competition for Allring.
• ▪We expect AllRing to be a key beneficiary of the multi-year advanced packaging trend, including CoPoS and SoIC, but large-scale revenue contributions will likely take time.
• ▪It is the sole WoW (Wafer-on-Wafer) dispenser supplier for SoIC, which we expect to be the next growth driver, contributing at least 2% of total revenue in 2026 and 4% in 2027.
• ▪Our implied 2027e target P/E is 40x, similar to its SoIC peer and lower than CPO peers. We expect new advanced packaging opportunities including CPO, CoWoP, and CoPoS to benefit the company in the long run.

Consensus Rating Distribution

Source: Refinitiv, Morgan Stanley Research

Risk Reward Themes

Secular Growth:

Positive

Technology Diffusion: Positive

View descriptions of Risk Rewards Themes here

BEAR CASE

58x 2027e EPS

We assume: 1) 60% revenue CAGR over 2025-28, thanks to stronger-than-expected capacity expansion plans for TSMC's CoWoS, CPO and SoIC; 2) gross margin expands to more than 55% in 2025-28, due to strongerthan-expected operating leverage resulting from the equipment production outsourcing strategy; 3) new product launches exceed expectations and AllRing increases its market share in other processes such as "CoW. "

42x 2027e EPS

We expect: 1) 46% revenue CAGR in 202528e after strong CoWoS capacity expansion for TSMC in 2024-25; 2) gross margin to be maintained at 48-53% from 2024-28 thanks to high operating leverage resulting from the equipment production outsourcing strategy; and 3) with new equipment launches, we expect AllRing to expand its market share in other processes. CPO, SoIC and other applications continue to bear fruit.

16x 2027e EPS

We assume: 1) -30% revenue CAGR in 202428 due to slower-than-expected CoWoS capacity expansion plans by TSMC; 2) gross margin falls below 40% owing to the high bargaining power of its customers; 3) market share loss in "WoS" process amid rising peer competition.

NT$810.00

NT$2,780.00

NT$1,617.00

NT$2,000.00

M Asia Pacific Insight

Risk Reward - AllRing Tech Co. (6187.TWO)

KEY EARNINGS INPUTS

INVESTMENT DRIVERS

• CoWoS capacity expansion from TSMC
• New technology migration such as SoIC and silicon photonics
• Strong operating leverage, given equipment production outsourcing strategy

GLOBAL REVENUE EXPOSURE

Source: Morgan Stanley Research Estimate View explanation of regional hierarchies here

MS ALPHA MODELS

3/5

MOST

3 Month

Horizon

Source: Refinitiv, FactSet, Morgan Stanley Research; 1 is the highest favored Quintile and 5 is the least favored Quintile

RISKS TO PT/RATING

RISKS TO UPSIDE

• Stronger-than-expected CoWoS capacity expansion
• Faster-than-expected adoption of silicon photonics
• Market share gains from peers, led by continuous R&D and China's localization trend

RISKS TO DOWNSIDE

• Slowdown in CoWoS capacity expansion
• Allring's "WoS" market share declining
• Slowdown in technology migration such as SoIC and silicon photonics adoption

OWNERSHIP POSITIONING

Inst. Owners, % Active

78.5%

Source: Refinitiv, Morgan Stanley Research

MS ESTIMATES VS. CONSENSUS

Source: Refinitiv, Morgan Stanley Research M Asia Pacific Insight

AllRing: Financial Summary

Income Statement

Cash Flow Statement

Balance Sheet

E = Morgan Stanley Research Estimates

Source: Morgan Stanley Research, Company Data M Asia Pacific Insight

FOCI: Estimate Revisions and Quarterly Financials

We narrow our loss estimate or 2026 but make signi icant cuts to 2027e and 2028e earnings: Weaker-than-expected 1Q26 and 2Q26 results were mainly due to ongoing capacity transition from the Hsinchu fab to the new fab in Thailand as the company prioritizes its SiPh/CPO development. The SiPh/CPO new capacity line will also take some time, and pre-mass production preparation such as destructive testing conducted could also affect its gross margin in 2026. Hence our 2026 earnings estimate is still a loss.

We make more significant cuts to our 2027-28 revenue and PS assumptions to reflect less CPO market share from its largest customer given fierce competition. We now expect 8-15% (vs. our previous expectation of 35%). Also, because we expect the company to continue expand the capacity, we see ongoing margin dilution from the new production ramp.

Ex ibit 47: FOCI: Estimate revisions

Source: Company data, Morgan Stanley Research (E) estimates

Ex ibit 48: FOCI: Quarterly financials

Source: Company data, Morgan Stanley Research (E) estimates M Asia Pacific Insight

FOCI: Valuation Methodology

Downgrade rom OW to EW but cut our price target (base case scenario value) only 3%, to NT$688: Largely offsetting the cuts to our 2027/2028 PS forecasts, we update the our beta assumption.

We keep our medium-term growth rate at 16%, in line with Asian optics peers (e.g., Landmark), to reflect rapid development in CPO and silicon-photonics technology. We also update the cost of equity from 12.9% to 11.6% (risk-free rate 2.0%, risk premium 6.9%, beta updated from 1.6 to 1.4 - last 52 weeks beta). We maintain our other assumptions: payout ratio of 61%, and terminal growth rate of 4%.

Our bull and bear case values also fall 3% each.

Ex ibit 49: FOCI: RI base

Source: Company data, Morgan Stanley Research (E) estimates

Ex ibit 51: FOCI: P/S

Ex ibit 50: FOCI: P/B

Source: Company data, Factset, Morgan Stanley Research estimates Source: Company data, Factset, Morgan Stanley Research estimates M Asia Pacific Insight

Risk Reward - FOCI Fi er Optic Communications Inc Risk Reward - FOCI Fiber Optic Communications Inc (3363.TWO)

(3363.TWO) FAU market is becoming crowded; EW

NT$688.00 PRICE TARGET

Base case, residual income model. Key assumptions: cost of equity of 11.6% (risk-free rate 2.0%, risk premium 6.9%, beta 1.4), a payout ratio of 61%, a medium-term growth rate of 16%, and a terminal growth rate of 4.0%.

RISK REWARD CHART

Source: Refinitiv, Morgan Stanley Research

BULL CASE

BASE CASE

EQUAL-WEIGHT THESIS

• ▪Co-packaged optics (CPO) are an advanced silicon photonics (SiPh) method that integrates optics and silicon on a single packaged substrate, to reduce signal loss, power consumption, and cost.
• ▪However, the FAU market is becoming crowded; We count at least 10 companies with CPO FAU products shipping, sampling or in pilot production.
• ▪Given its close partnership with TSMC, we think FOCI is still positioned to provide CPO's fiber array units (FAU) and related services, leveraging its ReLFACon technology.
• ▪At our price target, FOCI would trade at 68x 2027e P/E, but only 19x 2028e, which we think is fair for now.

Risk Reward Themes

Disruption:

Positive

Secular Growth:

Negative

Technology Diffusion: Positive

View descriptions of Risk Rewards Themes here

BEAR CASE

88x 2027e EPS

We assume: 1) 200% revenue CAGR, 202528e, from stronger-than-expected CPO development; 2) faster-than-expected CPO introduction; 3) gross margin improving to over 50% in 2027e thanks to scale effects and the company's technology competitiveness; and 4) >600% EPS CAGR, 2025-28e.

64x 2027e P/E

We project: 1) >120% revenue CAGR, 202528e, on fast CPO development; 2) gross margin improves to over 37% in 2028e thanks to scale effects and the company's technology competitiveness; 3) >500% EPS CAGR, 2025-28e.

31x 2027e P/E

We assume: 1) 50% revenue CAGR, 202327e, given slower-than-expected CPO development; 2) slower-than-expected CPO introduction; and 3) gross margin falling below 10% in 2027 due to the high bargaining power of customers.

NT$320.00

NT$895.00

NT$688.00

M Asia Pacific Insight

Risk Reward - FOCI Fiber Optic Communications Inc (3363.TWO)

KEY EARNINGS INPUTS

INVESTMENT DRIVERS

• Silicon photonics and CPO

GLOBAL REVENUE EXPOSURE

Source: Morgan Stanley Research Estimate View explanation of regional hierarchies here

RISKS TO PT/RATING RISKS TO UPSIDE

• Faster-than-expected CPO introduction
• Increased geopolitical tensions
• Significant AI/cloud capex increase

RISKS TO DOWNSIDE

• Slower-than-expected CPO introduction
• Easing geopolitical tensions
• Significant AI/cloud capex cuts

OWNERSHIP POSITIONING

Inst. Owners, % Active

76.2%

Source: Refinitiv, Morgan Stanley Research

MS ESTIMATES VS. CONSENSUS

FY Dec 2026e

EPS (NT$)

Sales / Revenue (NT$, mn)

EBITDA

Note: There are not sufficient brokers supplying consensus data for this metric

Note: There are not sufficient brokers supplying consensus data for this metric

(NT$, mn) Note: There are not sufficient brokers supplying consensus data for this metric

Net income

(NT$, mn) Note: There are not sufficient brokers supplying consensus data for this metric

ROE

(1.5)

(%)

Note: There are not sufficient brokers supplying consensus data for this metric

Mean Morgan Stanley Estimates

Source: Refinitiv, Morgan Stanley Research M Asia Pacific Insight M Asia Pacific Insight

FOCI: Financial Summary

Ex ibit 52: FOCI: Financial Summary

Income Statement

Cash Flow Statement

(2,542) Working Capital Change

4,968 Other adjustments

114 Other adjustments

2,954 Financial Ratios

91 Growth(%)

0 Operating profits

21,533 Margins (%)

2,297 Gross Margin

1,595 Operating Margin

1,464 Gearing (%)

Balance Sheet

E = Morgan Stanley Research Estimates

Source: Morgan Stanley Research, Company Data

Source:

M Asia Pacific Insight

ASE: Estimate Revisions and Quarterly Financials

We raise our EPS estimates 3% or 2026, 10% or 2027, and 23% or 2028: The increase mostly reflects margin expansion from better product mix, price hikes, and rising utilization rate, as well as the CPO business starting from 2027.

Ex ibit 53: ASEH: Estimate revision summary

Source: Morgan Stanley Research (e) estimates

Ex ibit 54: ASEH: Quarterly financials

Source: Company data, Morgan Stanley Research (e) estimates

M Asia Pacific Insight

Valuation methodology

We li t our price target rom NT$628 to NT$858: This reflects our earnings estimate revisions for 2026-28. We continue to derive our price target using the base case value from a residual income model. We also raise our intermediate growth rate assumption from 9% to 10%, and terminal growth rate from 3% to 3.5% given the upcoming CPO opportunity, which should benefit the company's TAM. Our cost of equity is unchanged at 9.8% (beta of 1.3, risk premium of 6% and risk-free rate of 2%) and

Our bull case value rises from NT$700 to NT$1,000, while our bear case value increases from NT$380 to NT$500, implying 30x and 15x our 2027e PS, respectively. We remain Overweight.

Ex ibit 55: ASEH: Residual income model

Source: Company data, Morgan Stanley Research (e) estimates M Asia Pacific Insight

Relative valuation

Over the past two months, AS 's share price has rallied (+45% vs. Taiex +25%) in response to investor expectations for its CPO testing and margin expansion. Despite this we remain OW, as the stock is still only trading at 21x our 2027e PS, which we view as attractive for a company that has increasing pricing power, AI revenue, and margin growth. Our price target implies 26x our 2027e PS, more than +2SD from its historical average of 13x since 2015.

Ex ibit 56: ASEH: One-year forward P/E chart

Source: Company data, Morgan Stanley Research (e) estimates

M Asia Pacific Insight

Risk Reward - ASE Technology Holding Co. Ltd. (3711.TW) Risk Reward - ASE Technology Holding Co. Ltd. (3711.TW)

We see further upside potential from AI/CPO; stay OW

NT$858.00 PRICE TARGET

Base case, residual income model. Key assumptions: cost of equity of 9.8%, intermediate growth rate of 10%, terminal growth rate of 3.5%, and cash dividend payout ratio of 60%.

NT$711.07

Source: Refinitiv, Morgan Stanley Research

BULL CASE

BASE CASE

OVERWEIGHT THESIS

• ▪Our checks show that ASE is receiving strong packaging overflow demand from TSMC, which could enjoy strong momentum in 2026 and after.
• ▪We now think ASE's LEAP (leading-edge advanced packing) revenue is likely to reach US$8.5bn in 2027e.
• ▪We also see strong revenue upside potential in CPO-related packaging and testing
• ▪Our price target implies 26x our 2027e EPS, similar to +2SD from its historical average of 13x since 2015.

▪However, we still view the P/E as

• attractive for a company that has increasing pricing power, AI revenue, and margin growth.

Source: Refinitiv, Morgan Stanley Research

Risk Reward Themes

Secular Growth:

Positive

Technology Diffusion: Positive

View descriptions of Risk Rewards Themes here

BEAR CASE

30x 2027e EPS

Strong semi growth; competition becomes rational thanks to merger; upside for SiP penetration rate with mainstream products: Competition becomes rational with sustained gross margin. Stronger price bargaining power and technology advancement thanks to smooth consolidation between ASE and SPIL. SiP shipments accelerate among mmWave AiP, camera modules, acoustic modules, 3D sensing, and wearables. ASEH develops comprehensive advanced packaging technology with high traction among customers.

26x 2027e EPS

Strong cycle with AI/advanced packaging as the driving force: Demand for wire-bonding and flip-chip from consumer tech demand is recovering while most of the capacity in Taiwan is full. The advanced packaging business should be the major source of margin accretion in future. Pricing for ATM businesses is likely to rise 5-20% in 2026e. CoWoS outsourcing from TSMC may aid its top line and margin profile as well as the CPO opportunity in 2027/2028.

15x 2027e EPS

Semis enter down-cycle, with less back-end outsourcing and big customers searching for more cost-effective alternatives: The macro situation weakens, impairing semi demand. The need for second sources causes big customers to shift back-end orders away from ASE, along with pricing erosion given competition. SiP adoption remains limited outside of wearables. Gross margins keep deteriorating given competition from Chinese peers.

NT$500.00

NT$1,000.00

NT$858.00

M Asia Pacific Insight

Risk Reward - ASE Technology Holding Co. Ltd. (3711.TW)

KEY EARNINGS INPUTS

INVESTMENT DRIVERS

• Global semi growth
• New applications for SiP
• Synergies from merger with SPIL

GLOBAL REVENUE EXPOSURE

Source: Morgan Stanley Research Estimate View explanation of regional hierarchies here

MS ALPHA MODELS

3/5

MOST

3 Month

Horizon

Source: Refinitiv, FactSet, Morgan Stanley Research; 1 is the highest favored Quintile and 5 is the least favored Quintile

RISKS TO PT/RATING

RISKS TO UPSIDE

• Stronger-than-expected global economic and semiconductor growth
• Margin expansion through merger consolidation
• New wearables project wins with higher margins

RISKS TO DOWNSIDE

• Slower-than-expected global economic and semiconductor growth
• Further margin erosion amid price competition
• Lack of new features in wearables, causing consumers to lose interest

OWNERSHIP POSITIONING

Inst. Owners, % Active

69.3%

Source: Refinitiv, Morgan Stanley Research

MS ESTIMATES VS. CONSENSUS

Source: Refinitiv, Morgan Stanley Research M Asia Pacific Insight

ASEH: Financial summary

Income Statements

Cash Flow Statements

(924,760) Working Capital Change

211,328 Financial Ratios

31,825 Margins (%)

Balance Sheets

e = Morgan Stanley Research Estimates

Source: Morgan Stanley Research, company data M Asia Pacific Insight

KYEC: Estimate Revisions and Quarterly Financials

We nudge our 2026 and 2028 EPS s up 1% and 2%; 2027e is virtually unchanged: 2028 revenue and earnings assumptions reflects the start of new US capacity contribution.

Ex ibit 57: KYEC: Earnings estimate revisions

Source: Morgan Stanley Research estimates

Ex ibit 58: KYEC: Quarterly financials