PDF 原檔：報告_SemiAnalysis_NPO光互連接棒_20260713_original.pdf

圖片清單（已驗證 2026-07-14）

ingest 時建立的「眼見為憑」圖片索引，是 lib/ 嵌圖的唯一真相來源；嵌入時只從這裡挑分類為「真資料圖」的。

原始內容

17 minutes semicinalysis

By Daniel Nishball, Wega Chu, Clara Ee, Gerald Wong, Terence Ong, Julien Martin-Prin and Myron Xie

Juy 1, 202

NPO Takes the Baton: How Nextgen Optica nterconnect is Now Focused on NPO // Mutipe Scaeup and Scae-out projects are now orienting towards NPO.

17 minutes

By , , , , , and Danie Nishba Wega Chu Cara Ee Gerad Wong Terence Ong Juien Martin-Prin Myron Xie

Executive Summary

• We have discussed the chaenges that vendors are facing in quicky bringing CPO to market. NPO and Puggabe CPO provide an aternative that deivers power efficiency whie sidestepping the attach yied probem and enabing optica engine vendor diversity.
• For Scae-up, Amazonʼs Trainium wi use NPO for both the UALink and NVLink versions; Huaweiʼs Ascend 50 UBMesh-Pod wi aso use NPO.
• Nvidiaʼs VRU NVL57 remains on CPO for now, and they coud pivot to NPO. They coud aso opt to scrap the optica cross-rack soution and try again with Feynman.
• We expect the tota key component TAM for CPO and NPO to reach $1.5B by 200. NPO shoud drive most of the growth in this TAM in 2028 and 202, representing 070% of optica engines shipped in those years. By 200, however, CPO wi ikey represent the majority of OE shipments as more patforms successfuy deveop their CPO soutions and as OCMSA becomes an option.

System Vendors Faing back to NPO

We have facing even the ower risk and simper use cases for CPO, namey scae-out switching. Nvidia has been strugging with its CPO optica engine OE production and with fiber attach issues and is currenty hamstrung by ower than idea Optica Engine attach yieds. This might not ony stymie their scae-out switch projects but coud aso derai pans to ship their VRU NVL57 8-rack scae-up word size system if these issues persist. Ramping scae-up optics is not easy and discussed at ength the various chaenges carries significant production risk. Meanwhie, the first systems to use optics for scae-up appear to be tapping NPO and Puggabe CPO first instead of CPO in part to de-risk, whie sti harnessing some of the benefits of CPO. Amazonʼs Trainium  wi be the first arge custom siicon system to attempt adopting NPO, whie Huaweiʼs Atas UBMesh-Pod buit around the Ascend 50 is aso adopting NPO for scae-up networking. On the scae-out front, Meta is paying many anges. Not ony does it have a

DR Optics CPO scae-out switch program buit by Ceestica, but it is aso exporing an NPO scae-out switch program. Meta is aso driving an OC MSA based CPO scae-up Tomahawk  based switch program that coud be used for its own MTA system or in conjunction with systems from merchant

CPO and NPO TAM Build-Up (Install Base Convention)

siicon vendors that are aso part of the OC MSA, but as depoyment is sti a few years out  Meta sti has time to wait for the kinks to be ironed out.

CPO Scale-Out 3.2T Equiv OEs

CPO Scale-Up 3.2T Equiv OEs

Units

Units

11,847

0

1,407,865

0

4,776,733

2,731,308

6,362,874

15,182,183

9,081,450

46,810,600

The impication is that NPO wi drive much of Optica Engine shipments in the eary days of CPO/NPO  making up most shipments in 2028 and 202 before scae-up CPO matures in earnest in 200.

Source: SemiAnaysis A Networking Mode

Reca that in the A Networking Mode, estimates and outputs such as pivot tabes are on an insta base convention. The 'nsta Base Conventionˮ aocates units and $ spend to the quarter in which the custer is brought onine. Each component and company wi differ in ead times and revenue recognition and wi require a different ead time to reconcie to revenue. Our company reconciiation tabs wi use a ead time that is typicay a 'bring forwardˮ of the unit demand indicated under the insta base convention to refect that fact that equipment is usuay purchased in advance of custer instaation.

Puggabes vs NPO vs CPO vs XPO and CPC

To understand the current batteground with respect to optica connectivity soutions, etʼs quicky recap the definitions and basic architecture of these soutions.

The most common form factor today is the puggabe transceiver - the optica engine sits at the facepate in a standardized cage, and the eectrica signa must trave from the ASC through the package BGA and across roughy 00mm of host PCB trace before it reaches the modueʼs connector.

Host PCB

Near-Packaged Optics (NPO)

The copper trace is ossy enough that the transceiver modue carries a fu/partia DSP to retime the signa - and that DSP is most of what the industry is trying to remove since it accounts for roughy haf the modueʼs power. Switch ASIC Juuuuu semicinalysis Remote Laser Source

Substrate

Source: SemiAnaysis A Networking Mode

A few form factors to repace puggabe optics exist. Near-Packaged Optics NPO moves the optica engine of the facepate and ands it next to the ASC package - but criticay, not on the ASC substrate. As the diagram beow shows, the engine sits on its own substrate, mated through a socketed NPO connector, with the high-speed channe running roughy 150mm through a high-performance substrate rather than an ordinary host PCB  ony owspeed signas and power are deivered through the channe.

We expect current NPO impementations to adopt 200G per ane PAM moduation and that most NPO soutions wi be a puggabe form factor (as detaied by the CPXMSA, which enabes vendor diversity within the rack.

Source: SemiAnaysis A Networking Mode

Copper Trace

Co-Packaged Optics (CPO) on Substrate

Co-Packaged Optics CPO puts the engine on the ASC substrate itsef, cutting the eectrica channe to 10mm. The key eement at pay here is that CPO is on the ASC substrate - this is what differentiates CPO vs NPO as opposed to whether the optica engine is puggabe. For exampe, Nvidiaʼs Quantum CPO soution uses three 1.T optica engines on an assemby that is puggabe onto the substrate - and for most, it sti counts as 'CPOˮ. wm

To carify what we mean, if the optica engine is puggabe AND it connects to the ASC substrate, then we wi ca it 'Puggabe CPOˮ, but if it is permanenty attached to the ASC substrate, then we wi simpy refer to this as 'CPOˮ. A few industry payers have set out to push for CPO soutions to be puggabe as this is the ony way to open the ecosystem to third-party OE vendors and as it aso Puggabe CPO dramaticay more depoyabe by derisking yied and rework.

Source: SemiAnaysis A Networking Mode

What is the impetus for exporing CPO in the first pace? CPO saves power because it eiminates the DSP by pacing the optica engine next to the XPU or switch ASC. However, if this is not matched by a commensurate downgrade in power for the Switch or XPU SerDes from LR SerDes to shorter reach SerDes, power benefits are imited beyond what can be achieved by Linear Puggabe Optics.

Todayʼs CPO impementations focus on DR Optics based Optica Engines, but if the OCMSA version of CPO is achieved, power savings on the optica engine wi be even more significant with the optica engine running on 50G NRZ anes instead of 200G PAM SerDes anes, taking down the OE  ELSFP power down from 5pJ/bit in the case of DR Optics CPO down to beow 

pJ/bit for OCMSA CPO. Further system power savings can be achieved by eiminating SerDes on the Switch or XPU and using a chip-to-chip interconnect to the optica engine. CPO aso has the benefit of supporting bandwidth density scaing beyond what is possibe with OSFP puggabe optics. CPO eiminates the facepate therma and throughput imit, since unike a puggabe modue, data transmission occurs within the package. n fact, Nvidiaʼs scae-out CPO switches wi excusivey use denser MMC connectors for the facepate, abandoning the ubiquitous MPO connector form factor. Optica Engines on nterposer wi aso unock more overa bandwidth escape from the package as shoreine density can be far greater if OEs are connected directy to the Switch or XPU, much ike HBM is connected today. The technica chaenges with impementing CPO from the get-go are the reiabiity and serviceabiity issues associated with packaging optica engines cose to the ASC as we as as the suppy chain ramps to support growing voumes. On top of this, one of the argest hesitations over CPO adoption stems from the fact that CPO impementations that are not puggabe resut in vendor ock in, and the resuting oss of sourcing fexibiity, fied serviceabiity and have the consequence of the switch vendor ikey taking a 70% gross margin stack on the optica engines vs the 0% gross margin that a third party puggabe Optica Engine vendor might charge. Meanwhie  NPO and Puggabe CPO offers much of the above benefits but without the vendor ock in. t aso inherenty sidesteps the attach yied issue that is the current headache for scae-out CPO switch production. We compare key interconnect soutions from power efficiency and cost per bit perspective in the tabe beow. NPO, CPO, and Puggabe CPO a have the potentia to drive better energy efficiency than LPO if a opportunities for power savings are harnessed. Ony OCMSA on interposer has the potentia to deiver even greater power savings, but this wi require customers to yied issues at the initia stages of CPO impementation potentiay accept vendor ock in, or at the very east accept that the switch

Traditional

or ASC vendor wi be the protagonist when it comes to deciding which vendor wi be chosen for Optica Engines. Substrate On Substrate, Not Pluggable Substrate On Substrate, Pluggable Interposer On Interposer

Signal Conditioning?

Electrical Channel Length

Energy Efficiency - OE + ELS

Energy Efficiency - Scale-Out + Switch? M

Hot Swappable

Serviceability

Expected Deployment Timeline

Pluggable Option?

Optical Engine Vendors

ELSFP Vendors

' Numbers presented are preliminary and are subject to change.

Fully Retimed

Linear

Retimed on Tx

Channel

Linear

Source: SemiAnaysis A Networking Mode

We outine beow how tota power coud ook ike when contempating the use of CPO/NPO for scae-out switching. Here we see that NPO, CPO and Puggabe CPO can offer the best energy efficiency, especiay if Switch ASCs can be designed with ower power SerDes.

Turning to tota system cost from a scae-out perspective, we see that the CPO and CPO OCMSA have higher tota switch seing prices than Puggabe CPO and NPO. This is because we are assuming a 70% vendor margin stack on the Optica Engines and FAU Assemby.

As mentioned above, OCMSA based CPO remains the most efficient interconnect with 2 times better energy efficient than NPO and 5 times better efficiency than LRO, but as with CPO, it inherenty means vendor ockin.

Linear

Linear

Linear

Optical Interconnect Solutions Comparison

Optical Engines and FAU Assembly

ELSFP

CPO

Gross Yielded COUPE Wafers

Pluggable Modules

102.4T Switch Chip + SW Box Items

Total Switch Power

OE Unit Test Yield

Bandwidth

OE Attach Yield per OE

pJ/bit (including Switch)

pJ/bit (OE+ELSFP Only)

Switch Die Attach Yield - 32 OEs

Total Cost of Ownership

Optical Engines and FAU Assembly

NPO

ELSFP

Gross Yielded COUPE Wafers

Pluggable Modules

102.4T Switch Chip + SW Box Items'

OE Unit Test Yield

Total Selling Price

1 Assuming 30% Gross Margin and 3 year warranty

Optical Interconnect Solutions Comparison

Traditional

Attached Optical Engine Yield Worksheet

LRO with

Yielded Die per

LPO + CPC using

Wafers per

NPO

OE Attach Yield per OE

Switch Die Attach Yield - 32 OEs

Source: SemiAnaysis A Networking Mode

What is cear from the tabe is that the intersection of best power efficiency and owest cost today is in puggabe CPO and NPO, and this is why these soutions are becoming the foca point for current system depoyment. What is not expicity speed out in this tabe is the fact that a ess-than-idea optica engine attach yied tends to increase unit optica engine costs, driving up overa costs for everyone.

Source: SemiAnaysis A Networking Mode

As promising as CPO is, it remains risky to eapfrog straight to CPO, and NPO is becoming a viabe choice for go-to market in ate 2027 and beyond for both scae-out and scae up. Some scae-up programs have eected to start with NPO  for instance Trainium, whie other scae-up programs ike Nvidiaʼs VRU NVL57 appear to be pivoting into NPO given chaenges with yieding CPO.

Scae-up NPO Projects

Units

Yielded

CPO

Cumulative 102.4T Equiv

CPO (OCI-MSA)

Amazon Trainium

Units

Quantity

36

The design for Trainium remains in fux sti - but as a base case scenario we see Trainium as being designed to impement a arge word size architecture using both copper backpanes and NPO.

We use the Trainium iquid cooed NL722 switched (i.e. Trainium MAX as a starting point but this time rather than forming a two-rack word size through cross-rack AECs, we wi form a higher desnity rack and a arger word size using NPO to connect oca GPUs to distant switches.  Each Trainium rack wi have 1 GPUs, four GPUs per each of  compute trays. For the UALink version,  57.T UALink switches wi be used, with four switches per each of  compute trays.

Source: SemiAnaysis A Networking Mode

A copper backpane wi be used to connect each of the 1 Trainiums in each rack ocay to every switch within the rack, and NPO wi be used to connect each GPU directy to distant switches within each of 7 other racks within the word size. We expect that Amazon coud continue to make use of smaer scae-up switches within compute trays to provide additiona scaeup switching capacity.

Trainium   NeuronLinkv5 Protoco UALink or NVLink)

AWSʼs Trainium scae up interconnect protoco is known as NeuronLink, a modified version of PCe protoco with AWSʼs own definition that suits the scae up requirements. Trainium 2 uses NeuronLinkv, which corresponds to PCe 5, and Trainium  uses NeuronLinkv, which corresponds to PCe .

For Trainium , NeuronLinkv5 wi be a bit more compicated as AWS aims to support both UALink and NVLink protocos. Off the package, Trainium  wi offer UALink protoco running at 128G based on PCe 7. This wi be the basis of NeuronLinkv5 and a the scae up connections coming out of the Trainium  packages. For NVLink Fusion integration, the UALink protoco signa wi be converted into NVLink anes via an externa gearbox off the Trainium  package. Beow we wi discuss the content each suppier pays in the NeuronLinkv5 UALink or NVLink protoco as we as how NPO ties into a of this.

Therefore, there wi be two versions of the Trainium rack:

• UALink running at 128G based on PCe Gen7
• PCe Gen7 gearboxed into NVLink Fusion running at 200G per ane

The NPO modues are paced on the PCB via ' CPXˮ connectors from Samtec cose to the Trainium  package. The ' CPXˮ connector socket is speced up to 22Gbs coonnectivity and 128DPs each. The connectors can support both fy over cabes and NPO modues, which means AWS aso have the fexibiity to decide on NPO ater given the fexibiity. n the image beow, Samtec demo their CPX connector under the CPO or CPC form factor, yet, the CPX connector aso supports NPO and NPC (fyover cabes) form factor. The use of SiFy wi foow Amazonʼs design, which is the UALink rack, whie Nvidia wi ikey use another soution. Si-Fy Si-Fy

Source: Samtec

Trainium Scae-up Network Suppiers

The utimate production mix among the two rack types is highy uncertain, and one track coud even get cut, but for now we penci in a 50%/50% UALink/NVLink spit over the product ifetime.

For UALink - we think Astera Lab wi be the primary vendor, bunding itʼs /O chipet, its UALink switch as we as an NPO soution. Astera has been puing its timeines for NPO/CPO  ate ast year it had pencied in 20282 for scae-up optics, whie by June 202 it was expecting first optica revenue by 2027  with NPO revenue in 2H27 for rack-to-rack connectivity, foowed by CPO scae-up by 2028 and after.

Simiary, for the NVLink-based SKU, Astera wi be providing the /O chipet with a gearbox, whie Marve wi tacke the NPO modue as we as the NVLink switch. n fact, a key revision to NVLink fusion in the past few months means that Nvidia is no onger the ony pace to get an NVSwitch, creating an opening for Marve. ndeed, on the Q F1/2 earnings ca, 'NPOˮ entered Marveʼs vocabuary for the first time, and the company introduced a broader 'scae-up opticsˮ category guided to roughy $00M for F1/28  more than doube the prior outook of $150M which was soey based on Ceestia A. t is important to highight that the design of the rack wi be heaviy driven by Nvidia to ensure successfu impementation of the NVLink scae-up network, and as such, Nvidia may have the fina word on whether NPO is used at a. For now, we penci in the use of NPO for the NVLink SKU.

Though the $500M quartery revenue run rate for Ceestia exiting F1/28 guided during the acquisition announcement was inked to a Tier 1 customer win and for a scae-up product (thus aigning with Trainium , subsequent commentary has highighted CeestiaAʼs EAM based technoogy as one soution of a broad portfoio of NPO and CPO impementations that aso incude MRMs and MZMs and we think that Ceestiaʼs EAMs wi not be used in the Trainium NPO soution. nstead, we expect to see Ceestia products coud be depoyed in appications that utiize the photonic bridge or coud incude depoyments of the Photonic Fabric Memory Appiance PFMA given that Marve is we into the design phase for various hyperscaer CXL / memory attach products.

Trainium Scae-up Network Architecture

We think that Trainium wi mirror the rack design of the Trainium NL722 (Teton MAX, ony with greater density at  compute trays, with 1 XPUs per rack vs the 72 GPUs per rack of the Teton MAX. t wi use backpane to connect to switch trays, coud aso use PCB traces to connect to smaer switch chips on the compute tray, and finay wi use NPO to connect XPUs to distant switch trays in the other racks.

Trainium4 NL144x8 Switched

Source: SemiAnaysis A Networking Mode

We are sti finaizing our view on what the scae-up networking topoogy coud ook ike, but the coud be a starting point. We shoud expect that Trainiumʼs topoogy coud incude smaer switches on the compute tray itsef in addition to a backpane that connects to a set of arger bandwidth switches. Again, the main evoution woud be that each Trainium is now aso connecting via NPO to distant scae-up switches in other racks. scae-up network topoogy empoyed in the Trianium

Each UALink Switch connects to 72 Trn3

72+ radix

Local Tray ICI

x64

per Trn3 (Uni-di)

Local Tray ICI

x64

per Trn3 (Uni-di)

Cross Rack ICI

×16

per Trn3 (Uni-di)

Source: SemiAnaysis A Networking Mode

Whie we are sti finaizing our view on what the scae-up topoogy woud ook ike, we see 1 GPUs deivering .72 Pbit/s uni-di of tota scae-up bandwidth in the UALink configuration and . Pbit/s in the NVLink configuration, which equates to  and .75 of .2T-equivaent NPO OEs per GPU.

Trainium3 NL72x2 Switched NeuronLinkv4 Scale Up Topology

Optical Engine and ELS Content per Rack Estimates

Logical GPUs per Compute Tray

Compute Blades per Rack

Logical GPUs per Rack

Switch Blades per Rack

L1 Scale-up Switch Chips per Rack

L2 Scale-up Switches allocated per Rack

OE Attached to GPU (3.2T Equiv.)

OE per L1 Switch Chip (3.2T Equiv.)

OE per L2 Switch Chip (3.2T Equiv.)

ELS Attach to GPU (6.4T Equiv.)

ELS per L1 Switch Chip (6.4T Equiv.)

ELS per L2 Switch Chip (6.4T Equiv.)

GPU OE per Rack (3.2T Equiv)

L1 Switch OE per Rack (3.2T Equiv)

External Laser Source per Rack (6.4T Equiv.

Optical Engines per GPU (3.2T Equiv.)

External Laser Source per GPU (6.4T Equiv.)

Source: SemiAnaysis A Networking Mode

Nvidia Scae-up NPO

We have discussed the various yied issues and fiber attach chaenges Nvidia has been facing on its CPO program - these aso impact the Vera Rubin NVL57 8-rack scae-up CPO project and may even carry over to a future OCMSA stye DWDM-based CPO that woud have otherwise made its debut in Feynman. This is why Nvidia has been contingency panning by ramping a potentia NPO impementation that focuses on 200G or 00G PAM aso using DWDM.

Nvidiaʼs VRU NVL72 CPO architecture wi empoy the QM5 NVLink Switch with  .2T Optica engines as a buiding bock. Each switch wi have 1.2Tbit/s uni-di of connectivity using a copper backpane connecting to a

133)

1 Асня

14,100 012/s w-

R300

GPUs within the same rate and wi empoy either two or three optica engines to connect with at most .Tbit/s uni-di via CPO to NVLink switches in other racks. Each compute tray of  NVSwitch chips wi have a tota of 108.8Tbit/s uni-di of bandwidth, 7.8Tbit/s connecting within the rack over the backpane, and 2.0Tbit/s via a tota of 10 activey used .2T Optica Engines to connect to the other 7 racks in the system. Ony 10 out of the 12 optica engines avaiabe in each switch tray are used, giving rise to the irreguar CPO bandwidth coming off each NVLink switch - two connect with .Tbit/s of bandwidth and two with .Tbit/s.

Source: SemiAnaysis A Networking Mode

f the above NPO impementation is ready in time for the VRU NVL57, then Nvidia coud ook to substitute NPO optica engines in pace of the CPO optica engines. t is aso quite possibe given the high production risk that Nvidia sheves the cross-rack scae-up design for Vera Rubin Utra and continues with Oberon stye racks unti Feynman.

Huawei NPO

Huaweiʼs Atas 50 SuperPod impements a muti-stage dragonfy with a scae-up word size of 8k NPUs: 8 1,02NPU UBMesh-Pods connected by high-radix switches HRS, each UBMesh-Pod comprising 1 racks connected in a D FuMesh, and each rack pairing  NPUs with 7.2T owerradix switches LRS across  panes. We covered the architecture in depth , incuding our estimate of $12 per NPU of in-rack copper backpane content. here

Rack Architecture

32 LRS, 64 NPUs per Rack Intra-rack

Source: SemiAnaysis A Networking Mode

GPUs per Server

Total Backplane Content

Flyover Cables

Total Backplane Content per XPU

Ascend 950 In-Rack Copper Content

Source: SemiAnaysis A Networking Mode

Unit Cost

Ascend 950

Quantity per

Extended

Source: SemiAnaysis A Networking Mode

The LRS network is a two-eve hierarchy per pane  10 L1 switches and 8 L2 switches in each pane which comes to 72 LRS switches per rack. The first eight L1 switches LRS 18 are NPU-facing eaves - each takes 8 00G downinks from NPUs through copper and drives 10 00G of upinks through NPO  eight upinks in a fu mesh to the paneʼs L2 switches and one ink each to the intra-pane LRS switches LRS  and LRS 10. Each L2 switch takes 8 00G downinks from the L1 eaves and drives 8 00G up to the L2 switches in the other 15 racks of the UBMesh-Pod, a through NPO.

Cacuating NPO attach rate, on the L1 side, 25 eaf upinks and 128 hub inks give 8 ports, on the L2 side, 25 downinks and 25 rack exits give 512 ports - which in tota gives us 8 00G optica port-ends per rack, or 58. Tbit/s of NPO bandwidth. At .2T per optica engine, that is 112 optica engines per rack - an attach ratio of 1.75 .2T-equivaent OEs per NPU.

Total L1 Links

Total L2 Links

Total Links

BW per Link

NPO BW per Rack

NPO BW per Module

3.2T-equivalent NPO per Rack

3.2T-equivalent NPO per GPU

Source: SemiAnaysis A Networking Mode

Scae-out NPO Projects Meta NPO

Meta has spent considerabe time and energy highighting the advantages of Broadcomʼs CPO soution. Their ECOC paper pubished reiabiity data across 1,0,000 00G-port device hours of operation for Baiy 51.2T CPO Switches. ts tak at ECOC presenting the paper went even further, presenting resuts for up to 15M 00G-port device hours, showing no uncorrectabe codewords UCWs) for the first M 00G-port device hours as we as a 0.5 0.1M device hour mean time before faiure MTBR for 00G 2xFR transceivers 550k for 2xFR gobay) vs 2.M device hour MTBF for CPO.

A foow-up update at OFC 202 highighted that testing had now reached 0M 00G-port device hours, and pointing out the 20M 00G-port device hours MTBF.

Huawei NPO Content per Rack

00 Meta

Source: Meta

There has been some foow thru on CPO switches  Ceestica wi be manufacturing 102.T switches for Meta, with production ramping in 2H27. However, Meta is aso simutaneousy pursuing an NPO switch program based on Broadcomʼs 102.T Tomahawk  Switch. n theory, CPO shoud be abe to provide a better channe than NPO and thus eventuay superior power and BoM cost - but NPOʼs advantage ies in optica engine modue vendor fexibiity and the cost savings from unbunding the optica engines from the switch ASC vendor and effectivey paying a 00% gross margin instead of a 70%  margin. Another factor in favor of depoying NPO-based soutions at this stage is the ongoing yied and production issues for CPO optica engines buit using TSMCʼs COUPE.

Unike the Davisson CPO patform, this NPO approach aows a mutivendor sourcing approach for optica engines, and Meta wi amost certainy be working with its current transceiver vendors such as nnoight, Eoptoink, Coherent, and others. This NPO switch aso aows operators to mix and match various types of optica engines. For instance, some hyperscaers are

Meta NPO

Meta CPO and NPO Content TAM (Install Basis Convention)

opting to depoy FR optics in some eaf to spine inks to simpify fiber depoyments and reduce fiber costs - so a switch that coud utiize DR NPO for downink and FR NPO for upink coud be usefu.

Meta CPO - DR Optics

Meta NPO

Meta NPO

OEs

OEs

484,704

784,000

1,341,360

368,000

1,347,581

366,638

Meta is taking its CPO program panning one step further and has been exporing CPO Optica Engines and ELSFPs that support OC MSA Gen1 specs - with 8 different waveengths per 12.8T ELSFP. The ight source can be spit across two .T Optica Engines, with each .T OE providing 2 anes of 200G each, and each ane in turn buit up with  ambdas moduated at 50G NRZ each. The use of OC MSA means it wi amost certainy be for a scae-up roe, possiby with the Tomahawk Utra 2 102.T switch.

n pursuing an OC MSA based CPO switch, Meta may be aiming to bootstrap the OC MSA switch and OE ecosystem and coud be ooking to see how much traction it can get and whether it can not ony buid its own MTA scae-up networks around the OC MSA but aso incorporate this into merchant siicon systems ike that of AMDʼs, which is aso an OC MSA consortium member. f there is good buy in from vendors and suppiers, then this coud potentiay give rise to broader adoption of OC MSA beyond Meta, but time wi te how much traction they get. f Meta has enough cout, they might even convince Broadcom to work with them to create a puggabe CPO version, which woud doubtess be wecomed by hyperscaers and ASC vendors.

Source: SemiAnaysis A Networking Mode

Aristaʼs nterconnect Options  XPO vs. NPO

We as an answer to CPO right after the MSA dropped in March 202. The arge form-factor puggabe promotes better therma management by enabing LPO and coud quadrupe the bandwidth density of a facepate. The XPO soution retains the puggabe mode, but in a new, much arger form factor, packing 200G anes in the same modue, a whie aowing better therma management with iquid cooing. This woud ony require 112.8T transceivers per switch; Arista caims that they can deiver a tota of 20.8T on a 1OU front pane and keeping the benefits of the puggabe: being hot swappabe. XPO aims to come to market aongside, Tomahawk 7, which wi doube the port radix to 1,02 200G SerDes compared to Tomahawk , which has 512 200G SerDes. Switch vendors that are buiding Tomahawk 7 based switches, but are stopping short of non-puggabe CPO, therefore have three avaiabe options: Use XPO, NPO/Puggabe CPO and OSFP transceiver cages. Arista Networks is ceary focused on bringing XPO to market for Tomahawk 7 switches, but it woud not be surprising if they are aso entertaining NPObased soutions aso. Both achieve the objective of a much denser facepate, and both open the door to eiminating DSPs. The main difference bois down to where it wants to take impementation risk, in getting optics to work or in getting a onger eectrica channe to work with Linear optics. An NPO soution woud aow for a very high facepate density as the optica engine is now paced on the PCB, ony eaving fiber connectors on the front of the switch. However, servicing a faied optica engine requires opening the box and reseating or repacing a socketed engine - far more intrusive than hot-swapping a front-pane puggabe, though externa aser sources remain fied-repaceabe. discussed the merits of the XPO MSA

The OSFP transceiver-based option wi sti ikey remain popuar among operators that have an estabished, ow-cost 1.T transceivers suppy chain, despite the arge switch form factors that this impies.

Source: SemiAnaysis A Networking Mode, Arista Networks

Googe NPO

Googe has in the past been very puggabe optics focused, but in future TPU versions, with considerabe orders aready paced for deivery in ate 202 and eary 2027! We think Googe coud expore NPO ater for its Virgo network, but we donʼt see a roe for NPO in the next few years and think these reports probaby stem from some kind of misunderstanding. some have caimed that they are aso exporing the use of NPO

The argument here is that NPO coud be used to enabe higher density interconnect on the compute trays, repacing the use of ACCs and DACs. However - the TPUv8i Boardfy) ony requires 2 1.T ACCs, 1 1.T DAC and 1 1.T puggabe optica transceiver, empoying another 1.T over fyover cabes and 1.T over PCB traces to achieve .T of bandwidth. Meanwhie, the TPU V8t D Torus) aso has .T of scae-up bandwidth per TPU, carried over PCB as we as  OSFP cages per TPU to which ACCs or DACs or Puggabe transceivers can be inserted depending on where in the

D Torus topoogy that TPU is. Again, this is hardy pushing the imits on facepate density - so the use of NPO here seems to ony add risk and compexity, with the main positive, NPOʼs greater range, not needed for the copper-based inks. Some aso say that Googe coud use NPO for Virgo. The first instances of the Virgo network are currenty being depoyed and wi be in use with the TPUv8t, which means that Virgo network is not using XPO or NPO as of now, and current scae-out bandwidth needs can easiy be covered by current puggabe soutions. Googe is ikey to keep the Virgo network for scae-out with the upcoming version of the TPUs, mainy with Humufish TPUvt) and cefish TPUv10t). Current scae-out bandwidth for Zebrafish generation TPUv8t) sits at 800G per TPU but is very ikey to increase over time with next generations, which coud require the Virgo network to adopt XPO with Tomahawk  and TPUvt, but NPO woud ony come in with Tomahawk 7 and TPUv10t in the coming years. Here, the benefits are ike what has been mentioned above in our XPO vs NPO discussion. NPO is another way to impement inear optics, but the tradeoff vs XPO is taking on different risks  XPO uses CPC to deiver a ceaner eectrica channe to the facepate, but the attenuation due to distance is unavoidabe. NPO cuts that eectrica channe distance consideraby, but it introduces the risk of ramping optica production and reiabiity risk.

CPO and NPO Market Estimates Updated

We have updated our CPO and NPO market projections to incorporate the deveopments outined.

NPO Scale-Out 3.2T Equiv OEs

NPO Scale-Out 3.2T Equiv OEs

NPO Scale-Up 3.2T Equiv OEs

NPO Scale-Up 3.2T Equiv OEs

NPO 3.2T Equiv OEs CPO Scale-Out 3.2T Equiv OEs NPO 3.2T Equiv OEs CPO Scale-Out 3.2T Equiv OEs

CPO Scale-Up 3.2T Equiv OEs CPO Scale-Up 3.2T Equiv OEs

CPO 3.2T Equiv OEs semianalysis Total 3.2T Equivalent Optical Engines - CPO + NPO CPO 3.2T Equiv OEs Total 3.2T Equivalent Optical Engines - CPO + NPO

CPO and NPO TAM Build-Up (Install Base Convention)

CPO and NPO TAM Build-Up (Install Base Convention)

Units

2026

2027

2028

2029

2030

2027

2028

2029

2030

1,341,360 1,347,581

1,347,581

366,638

366,638

1,312,500 16,161,860 55,767,568 71,651,985

2026

Units

Units 0 484,704 1,341,360 Units 0 484,704

Units

Units

Units

Units

Units

Units

Units

Units

Units

Units

Units

Units

Scale-out FAUs and Assembly - CPO + NPO

EUnits,

Scale-up FAUs and Assembly - CPO + NPO Units.

399,000

Source: SemiAnaysis A Networking Mode

Scale-up 6.4T ELS - CPO + NPO

6.4T External Laser Source (ELS)

Scale-out Shuffle Box

Scale-out Optical Engines

Scale-up Optical Engines

Total Optical Engines

Scale-out FAUs

Scale-up FAUs

Fiber Attach Unit (FAUs)

Scale-out 6.4T ELS

Scale-up 6.4T ELS

6.4T External Laser Source

Scale-out Shuffle Box

Total Key Component TAM

.. Of which: Scale-out

.. Of which: Scale-up semic

Units

Units

3,205,069 22,279,953 63,478,023 81,100,074

946,284

3,619,046 4,575,227

656,250

4,804,044

8,080,930 27,883,784 35,825,993

1,602,534 11,699,976 32,459,011 40,630,037

Source: SemiAnaysis A Networking Mode

Discaimers

Anayst Certifications and ndependence of Research.

Each of the anaysts whose names appear in this report hereby certify that a the views expressed in this Report accuratey refect our persona views about any and a of the subject securities or issuers and that no part of our compensation was, is, or wi be, directy or indirecty, reated to the specific recommendations or views in this Report. SemiAnaysis LLC (the 'Companyˮ) is an independent equity research provider. The Company is not a member of

199,500

205,424

the FNRA or the SPC and is not a registered broker deaer or investment adviser. SemiAnaysis has no other reguated or unreguated business activities which confict with its provision of independent research. Limitation Of Research And nformation. This Report has been prepared for distribution to ony quaified institutiona or professiona cients of SemiAnaysis LLC. The contents of this Report represent the views, opinions, and anayses of its authors. The information contained herein does not constitute financia, ega, tax or any other advice. A third-party data presented herein were obtained from pubicy avaiabe sources which are beieved to be reiabe; however, the Company makes no warranty, express or impied, concerning the accuracy or competeness of such information. n no event sha the Company be responsibe or iabe for the correctness of, or update to, any such materia or for any damage or ost opportunities resuting from use of this data. Nothing contained in this Report or any distribution by the Company shoud be construed as any offer to se, or any soicitation of an offer to buy, any security or investment. Any research or other materia received shoud not be construed as individuaized investment advice. nvestment decisions shoud be made as part of an overa portfoio strategy and you shoud consut with a professiona financia advisor, ega and tax advisor prior to making any investment decision. SemiAnaysis LLC sha not be iabe for any direct or indirect, incidenta or consequentia oss or damage (incuding oss of profits, revenue or goodwi) arising from any investment decisions based on information or research obtained from SemiAnaysis LLC. Reproduction and Distribution Stricty Prohibited. No user of this Report may reproduce, modify, copy, distribute, se, rese, transmit, transfer, icense, assign or pubish the Report itsef or any information contained therein. Notwithstanding the foregoing, cients with access to working modes are permitted to ater or modify the information contained therein, provided that it is soey for such cientʼs own use. This Report is not intended to be avaiabe or distributed for any purpose that woud be deemed unawfu or otherwise prohibited by any oca, state, nationa or internationa aws or reguations or woud otherwise subject the Company to registration or reguation of any kind within such jurisdiction.

Copyrights, Trademarks, nteectua Property. SemiAnaysis LLC, and any ogos or marks incuded in this Report are proprietary materias. The use of such terms and ogos and marks without the express written consent of SemiAnaysis LLC is stricty prohibited. The copyright in the pages or in the screens of the Report, and in the information and materia therein, is proprietary materia owned by SemiAnaysis LLC uness otherwise indicated. The unauthorized use of any materia on this Report may vioate numerous statutes, reguations and aws, incuding, but not imited to, copyright, trademark, trade secret or patent aws. Private nvestment Discosure. Each anayst and/or author contributing to this Report hereby discoses that they may hod, directy or indirecty, private investments in companies, sectors, or asset casses discussed or referenced herein. Such hodings, if any, are discosed externay with a third-party vendor. SemiAnaysis LLC requires that no author or anayst aow their persona investment positions to infuence the views, opinions, anayses, or concusions expressed in this Report. Readers shoud be aware that the existence of such hodings, even where discosed, may present a potentia confict of interest, and are encouraged to weigh this accordingy when evauating the contents of this Report. ETF and Reguatory Status Discaimer. Company does not sponsor, endorse, se or promote any ETF, and makes no

From time to time, The Company may coaborate with asset managers, issuers, sponsors, index providers or other financia institutions in connection with the deveopment, aunch or support of exchange-traded funds ('ETFsˮ) and other investment products, incuding by providing research, market anaysis, index-reated research or other research reated services. The representation or warranty, express or impied, regarding the advisabiity of investing in any such ETF. n connection with the services described herein, the Company does not act as a fiduciary to any investor, fund, sponsor, issuer or other party. The Company is not registered with the U.S. Securities and Exchange Commission or any state securities authority as an investment adviser or exempt reporting adviser. The Companyʼs roe is imited to providing research and reated services, and it does not provide individuaized investment advice, portfoio management, brokerage services or other services requiring registration as an investment adviser.