報告_SemiAnalysis_800VDC與CPO延遲_20260608

PDF 原檔：報告_SemiAnalysis_800VDC與CPO延遲_20260608_original.pdf

原始內容

June , 202

Powered Down, Lights Off. 800VDC Pushout and CPO Deays // Muti-Vertica Note

8 minutes

By , , , and Konrad Wang Nige Chiang Nick Doye Doug OLaughin Danie Nishba

Executive Summary

• Mass adoption of Nvidiaʼs native singe-ended 800VDC design , with 800VDC voume shipments pushed to 2028. 00VDC, a separate HVDC architecture, remains on schedue for hyperscaerʼs ASC depoyments.
• ndustry chatter suggests that hyperscaers are pushing back on adoption of the singe-ended 800VDC architecture driven by Nvidia, given that 800VDC is not a necessity for Rubin which wi sti take 50VDC. They beieve that taking grid power at 5050VDC, stepping up to 800VDC and back down to 50VDC to
• feed the compute tray is inefficient. nstead, we see hyperscaers increasingy pushing for power to be deivered at a higher votage before being stepped down to the compute tray.
• 00VDC is sti set to proceed in 2H2 as expected, primariy for hyperscaersʼ in-house ASC depoyments. We expect 00VDC sidecar orders to and ate this year, with manufacturing ramping in Q1 2027.
• Net-net, this means that sidecar voumes that were initiay going to be driven by Rubin Utra/Kyber deiveries wi be moved into the 2028 window.
• 2027 CPO expectations ook too aggressive Co-Packaged Optics CPO wi be deayed versus current Street expectations . We expect to revise down scae-out CPO shipments in 202 and 2027  meanwhie we have aways had Scae-up CPO ramping in earnest from 202 even though the street has been caing for 2028 or even 2027 ramp timeines for Scae-up CPO. nstead - many NPO projects wi be ramping, but this may pay more into the hands of transceiver vendors.
• F or Scae-out CPO switches, CPO System-eve integration is the gating concern with yied economics remaining a major barrier. At an optimistic 5% optica-engine attach yied and 2 COUPEs per ASC, system yied is ony 1% . The Street modes 70100k+ Scae-out CPO switches produced annuay by 2027, but these issues are eading to much ower current production eves - putting us off track with respect to those numbers. We wi ikey revise down Scae-out CPO switch shipments in upcoming Networking mode updates.
• Overa, we came away from Computex incrementay more positive on Ampheno, Vertiv, Forgent Power Soutions, Legrand and FormFactor. Conversey, we are incrementay more negative on Lumentum, Himax, Navitas, and Wofspeed.

Recent Winners become NearTerm Losers and Vice Versa

800VDC and CPO are two themes which have been dominating the semiconductor market narrative this year. Weʼve been positive on both, with dedicated Newsetters on & . CPO 800VDC

With this note, we expect to reset investor expectations and especiay sentiment. We think positioning is stretched to a degree that matters more than the fundamentas here. The 'botteneckˮ trade (especiay in photonics/optics and power semis) has become the most crowded ong in the A compex, ikey funded by shorts against the argecap patform owners NVDA, AVGO.

Many of these names sit at or near a-time highs on momentum, with sentiment extremey buish and risk toerance maxed. That asymmetry is the opportunity: when the most-extended, most-evered part of a trade gets a negative timing confirmation, the unwind is vioent, and the funding shorts squeeze back, independent of the ong-term bu case , which we sti hod. We do not beieve this dynamic appies to memory, which is a consistent botteneck with tighter suppy-demand.

Our biggest Computex 202 takeaway is that both CPO and 800VDC have a high ikeihood of deays compared to origina ramp expectations. CPO system eve integration is more compicated than the market appreciates, and we beieve shipments wi be meaningfuy beow prior expectations. ndustry chatter suggests hyperscaers are pushing back on the singe-ended 800VDC architecture driven by Nvidia, given it is not a necessity for Rubin, with voume shipments now pushed to 2028.

HVDC roadmap in fux 00VDC sti happening 2H2 as expected, but 800VDC is pushed out

Contrary to our prior expectation of 800VDC being a 2027 story, we now 800VDC, and the underying ogic sti hods: increased rack power, centraized power deivery, and reduced conversion osses by stepping see adoption pushed out to 2028. Nvidia is sti pushing the industry toward votage down coser to the compute tray. However, penetration wi be ow in 2H2/2027 because it is not necessary for Vera Rubin. Rubin Utra and Feynman are more ikey to be where 800V becomes necessary, with Rubin Utra designs ony being finaized ater this year.

• ndustry chatter suggests that hyperscaers are pushing back on the adoption of 800VDC given that Nvidia seems to have mutipe power architecture options for the Rubin generation, and 800VDC is not a necessity. n their view, taking grid power at 5050VDC, stepping up to 800VDC and back down to 50VDC to feed the compute tray is highy inefficient. We beieve that hyperscaers are increasingy pushing for power to be deivered at higher votage before being stepped down to the compute tray.
• Technoogy adoption pushout, not a canceation: Rubin Utra/Kyber was designed with native 800VDC input to the GPU compute tray, but this has been deayed. We fagged this in our Computex preview, and our Acceerator Team pushed out Kyber expectations. However, 800VDC is a must when the GPU compute tray input requires 800VDC. We remain of the view that at very high tray and package power eves, native HVDC distribution becomes compeing. Whie not our base case, we note there are benefits to a Rubin Utra/Oberon design which takes 800VDC input, given that the compute tray wi ikey exceed 15kW TDP.
• 00VDC proceeding in 2H2 as expected: t is important to note that 00VDC is not the same as 800VDC. The former is a high-votage direct-current HVDC architecture that the hyperscaers are pursuing themseves to 1 centraize power deivery at higher votage for better efficiency and 2 avoid ACDCAC conversion osses with the UPS. We beieve that the 00VDC rack architecture is primariy

for hyperscaersʼ in-house ASC efforts, and this is sti on track. We expect 00VDC sidecar orders to and ate this year, with manufacturing ramping in 1Q27. That said, we are not ruing out hyperscaers using the 00VDC sidecar to support Nvidia hardware given that the DCDC power sheves shoud aow for this.

800VDC Read-Across to Stocks in our Coverage

• Power rack suppiers: We see the deay as neutra for power rack suppiers Vertiv VRT, Deta 208 TT, and Lite-On 201 TT, as the sidecar/power rack transition is happening regardess of whether the bus is 00V or singe-ended 800V.
• Vertiv is particuary we-positioned because the 800VDC deay extends the ife of their arge UPS business. At Computex, Vertiv demoed a grey space power rack design which ocates the PSU and PDUs outside of the T room to preserve precious white space, that we found compeing.
• Grey-space eectrica equipment suppiers: We see this as positive for grey space suppiers Forgent Power Soutions FPS, Legrand LR FP, Schneider Eectric SU FP, Hammond Power Soutions HPS.A CN and ABB ABBN SW that were at risk of osing LV transformer, LV switchgear and busway content. The pushout of 800VDC directy transates to increased upside and a onger growth runway for these names.
• Board-eve VRM / power semiconductors: Siicon-based passives and power semiconductors win regardess of architecture. Both 00V and 800V sidecars need superjunction MOSFETs, resistors, inductors, and capacitors for puse-oad transient absorption in power sheves, BBUs, and power racks. Vishay VSH suppies superjunction MOSFETs, resistors, and inductors. MLCC content scaes ineary with rack TDP Murata 81 JP, SEMCO 00150 KS, Yageo 227 TT, TDK 72 JP. nfineon FX GR appears to be the best-positioned power semi because they are hedged across Si superjunction, SiC, and GaN. At

the board/compute tray eve, VRM smart power stages step 8V/12V down to sub-1V at the GPU die, and this is unaffected by 800VDC deay. The 8V-to-sub-1V conversion chain stays the same whether the upstream architecture is AC, 00V, or 800V.

• Payers: MPS MPWR, Renesas 72 JP, nfineon, with TXN and ON quaifying as new entrants.
• Wide-bandgap pure-pays: We beieve this puts wide-bandgap WBG suppiers in an awkward spot. 00V uses some compound semi GaN is more efficient at that votage, though SiCʼs suppy chain is more mature), so the 00V transition is cose to neutra for the WBG vs siicon debate. 800VDC is where WBG content reay infects; a pushout means the incrementa WBG content upift that woud justify current mutipes on pure-pay names ike Wofspeed WOLF or Navitas NVTS has no meaningfu near-term catayst.

CPO Costs and Physics are More Prohibitive than Expected

We are positive about copper and puggabe optics reative to CPO. For Scae-up, we have aways seen the huge infection in voumes coming in 202 as key projects from AWS, AMD and Feynman ramp in earnest. Optica Engines on nterposers wi ony be fuy ungated and start ramping in that time period, opening the door to true ubiquity of CPO, but ony after 202

and 200.

n contrast, the Street has misinterpreted COUPE Optica Engine production voumes, first incorrecty assuming it was for a CPO Rubin Utra Kyber made officia that this woud not happen. We do have voumes of the VRU NVL57 in 2027 and 2028, but this wi ony use CPO from switch to switch and not to GPUs, and we donʼt see project being arge enough to move the neede and most on the Street mode too aggressive of a timeine. Overa, 202 is a more sensibe target for Scae-up CPO voume shipments and street expectations of gamechanging jumps in CPO voume in 2028 ook optimistic. took this view, and we see the significant we debunked this idea we before GTC 202ʼs announcements Our first 202 estimates from eary Apri

infections happening in 202 and beyond, coinciding with Feynmanʼs ramp. n the meantime, many NPO projects wi be ramping in decent voume, but this may pay more into the hands of transceiver vendors. Turning to Scae-out, we wi ikey revise down CPO switch forecasts in upcoming Networking mode updates. Scae-out CPO wi sti ead, but yied issues must be soved first. n addition, we had assumed 85% penetration for CPO switches at Neocouds. We continue to think that adopting CPO for Neocouds makes sense, but we have not yet found the adoption rate to be fuy universa, though we think adoption wi increase over time. The Street currenty modes 0100k+ Scae-out CPO switches shipped by 2027, driven by expectations of a sharp scae-out ramp and strong adoption rates at Neocouds, and we think todayʼs pace of scaeout production is too ow to reach this bogey. The market has been focused on . Whie asers remain an important botteneck, this framing misses other key depoyment gates, specificay COUPE deveopments. Whie COUPE deveopment remains on track for Nvidia and other adopters such as Broadcom, AMD, and Ayar Labs, system-eve integration with COUPEs remains chaenging . nP based CPO asers as a structura constraint for the ramp of CPO

• We expect Spectrum  CPO output SN810, SN800 to sip by more than two quarters. NVDAʼs Spectrum  CPO, the first 102.T switch with second-gen COUPEs, recenty showed .5 dB of insertion oss in on-board system-eve testing, consuming the entire optica channe budget. This is worse than Spectrum 5 CPO 'Agoraˮ), which uses the same COUPE count per ASC 2, the same connectors, FAU, and simiar system design. Neither NVDA nor TSMC has identified the source of the probem; efforts have shifted toward fundamenta assemby-process redesign.
• The yied math is punishing. ndustry chatter puts optica engine attach yied at an optimistic 5% today. At 2 COUPEs per Spectrum  ASC, that compounds to 1% system yied 0.5^2. Every COUPE must be perfect post-couping; there is no rework path on a sodered switch

substrate. The industry needs .5% attach yied per engine to make voume economics work, deivering 85% system yied at 2 engines.

• NVDAʼs Quantum X50 nfiniBand CPO is in comparativey better shape: ony  COUPEs per modue, so defective modues can be screened and the best ones seected for assemby. Even if rea attach yied is beow 5%, which is highy probabe, the sma modue granuarity makes the economics manageabe.

CPO deays reinforce the case that copper remains the primary interconnect for scae-up networks, with puggabe optics continuing to serve scae-out, supporting sustained demand growth for both categories. We , and noted another positive Credo deveopment. defended AECs earier this year ast week

CPO Read-Across to Stocks in our Coverage

• Reative to market expectations, we are most positive on copper names Ampheno APH, Semtech SMTC, and MACOM MTS  some of these Copper-exposed companies have been argey ignored despite a revenue TAM that we beieve wi ceary x in the next few years.
• We sti ike Optics companies evered to puggabe transceivers and DSPs rather than CPO, namey Marve MRVL, nnoight 0008.SZ, Eoptoink 00502.SZ, Tower Semiconductor TSEM, STMicroeectronics STM, and Astera Labs ALAB as we see the
• puggabe transceiver TAM continuing to grow at a rapid pace. The Networking Mode has discussed the growing TAM for optics at projects ike Googeʼs TPUv and v10. ndeed, many NPO projects wi aso be ramping in decent voume in the next few years, but this may pay more into the hands of transceiver vendors.
• We are more conservative on names where CPO voume is a materia part of the bu case , incuding Lumentum LTE, Coherent COHR, Himax HMX and Appied Optoeectronics AAO, though we sti think CPO has a 'brightˮ future once infection point in 202200 is reached.
• We continue to be positive on the CPO testing theme. As we detaied in our CPO test equipment andscape note and subsequent update, CPO test equipment is a picks-and-shoves beneficiary that shoud see procurement ahead of CPO voume. We remain most constructive on Teradyne TER, the frontrunner in NVDA quaification and ficonTEC partnership; FormFactor FORM for PC wafer probing; Chroma 20.TT for die-eve and system-eve test; and Hon Precision 77.TT for hander monopoy in A/HPC fina test. This underscores why testing is so critica: with system-eve integration aready consuming the entire channe budget at 2 COUPEs, the ony ever eft is ensuring every optica engine entering assemby is fawess.

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