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報告_OCP2026_TI_800V_DCDC拓撲比較_20261015

PDF 原檔:報告_OCP2026_TI_800V_DCDC拓撲比較_20261015_original.pdf

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圖片清單(已驗證 2026-10-19)

檔名 頁 分類 親眼所見內容
報告_OCP2026_TI_800V_DCDC拓撲比較_20261015_p4.png p4 真資料圖 800VDC 到 <1V 的四條降壓路徑方塊圖:HV IBC 16:1 到 50V(Option 1)、64:1 到 12V(Option 2)、128:1 到 6V(Option 3)、50V 穩壓 DC-DC 到 1.8-6V 接整合式 buck(Option 4)
報告_OCP2026_TI_800V_DCDC拓撲比較_20261015_p6.png p6 真資料圖 五種 800V 架構端到端效率比較(20kW):67%、64%(LPD)與 73%(VPD)、68%、74%(128:1+VPD)、73%,標示各級效率與對應 TI 板卡實物
報告_OCP2026_TI_800V_DCDC拓撲比較_20261015_p7.png p7 真資料圖 50V 側 FB/LLC/HSC/Buck 電路圖與比較表(調節、效率、密度、複雜度),右側為 800V 堆疊 LLC 電路
報告_OCP2026_TI_800V_DCDC拓撲比較_20261015_p8.png p8 真資料圖 50V-6V LLC(750-1000W、96-97%、2000W/in3)與 800V-6V 堆疊 LLC(10,000W、94-96%、2000W/in3)實板標註:650V GaN、8 顆矩陣變壓器、高電流 bus bar、隔離器
報告_OCP2026_TI_800V_DCDC拓撲比較_20261015_p9.png p9 真資料圖 50V 與 800V 保護電路對照及 800V 硬短路示波器波形(<1µs 短路保護、50A/div);800V 側雙邊保護、SiC FET

原始內容

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800V Data Center DC/DC Design Considerations, Topology Comparisons, and Trade-offs ] David Reusch Texas Instruments, Data Center Systems Engineer RACK & POWER

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“The computer has seen exponential growth in performance and the power requirements have increased… these demands are expected to continue” Evolving Data Center Power Demands Source: OCP Global Summit 2025 “800VDC MGX Accelerated Computing Rack & Energy Storage for Improved GPU Power Utilization” Jared Huntington and Mike Tu, NVIDIA 20 years: Source: Ed Stanford, “New processors will require new powering technologies,” Magazine of Power Electronics Technology, Feb. 2002, pp. 32-42 2006, David Reusch, MS Thesis ~200W ~2000W per processor per processor

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Evolving Power Distribution Methods 50V Busbar Rack 800V Busbar Rack V↑ I↓

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The Best Way To Get From 800VDC to >1V IT Tray Hotswap 800V or +/-400V DC Multiphase Buck VRs ~50V (16:1) Option 1 <1V HV IBC Telemetry (V/I)

5kA Power Distribution Board (PDB) Isolation Barrier LV IBC 4:1 or 8:1 ~12V or ~6V ASIC IT Tray Hotswap 800V or +/-400V DC Multiphase Buck VRs ~50V (16:1) Option 1 <1V HV IBC Telemetry (V/I) 5kA Power Distribution Board (PDB) Isolation Barrier LV IBC 4:1 or 8:1 ~12V (64:1) Option 2 ~12V or ~6V ASIC IT Tray Hotswap 800V or +/-400V DC Multiphase Buck VRs ~50V (16:1) Option 1 <1V HV IBC Telemetry (V/I) 5kA Power Distribution Board (PDB) Isolation Barrier LV IBC 4:1 or 8:1 ~12V (64:1) Option 2 ~6V (128:1) Option 3 ~12V or ~6V ASIC IT Tray Hotswap 800V or +/-400V DC Multiphase Buck VRs ~50V (16:1) Option 1 <1V HV IBC Telemetry (V/I) 1.8V-6V Option 4 5kA Power Distribution Board (PDB) Isolation Barrier LV IBC 4:1 or 8:1 ~12V (64:1) Option 2 ~6V (128:1) Option 3 ~12V or ~6V ASIC Integrated Buck VRs 50V Regulated DC-DC

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L 8/4:1 IBC LPD Multiphase VR 0.8V 6/12V 50V RPOL-PDN RIBC-PDN2 Lateral Power Delivery (LPD) Approach 8/4:1 IBC 6V 0.8V 50V VPD Multiphase VR Vertical Power Delivery (VPD) Approach 16:1 IBC 800V RIBC-PDN1 16:1 IBC 800V Option 1 LPD Option 1 VPD Option 2 LPD Option 3 VPD Evolving Power Distribution Networks

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HV IBC 16:1 98% 800VDC 50V LV IBC 4:1 97% 12.5V 0.8V 20kW 99.8% 97.5% 81% 67% 64% 73% 68% 74% 73% 800VDC 50V 12.5V 0.8V HV IBC 16:1 98% 800VDC 50V LV IBC 8:1 96% 90% 81% 0.8V 20kW 99.8% 97.5% 91% 800VDC 50V 6.25V 0.8V HV IBC 64:1 97% 800VDC 12.5V Multiphase Buck VRs LPD = 89.5% 0.8V 20kW 97.5% 80% Multiphase Buck VRs LPD = 89.5% 12.5V 0.8V 800VDC 800VDC 6.25V 0.8V HV IBC 128:1 95% 800VDC 6.25V Multiphase Buck VRs VPD = 88% 0.8V 20kW 97.5% 91% HV IBC 16:1 98% 800VDC Integrated Buck VRs 85% 0.8V 20kW 96% 50V 50V Regulated DC-DC 95% 1.8-5V 99.8% 96% 800VDC 50V 1.8-5V 0.8V Comparing 800V Architectures 6.25V 0.8V LPD = 92% Multiphase Buck VRs VPD = 88% 6.25V

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Full Bridge (FB) LLC Hybrid Switched Capacitor (HSC) Buck Stacked LLC Topologies HVDC requires isolation, increased clearance, soft- switching, high current rectifiers 50V 800V FB LLC HSC Buck Module or chip-down Module Module Both Both Regulation Fully regulated Unregulated Semi-regulated Fully regulated Efficiency Medium High High Medium/Low Power density Medium High Medium Low Output voltage scalability High High Low Medium Complexity Medium High High Medium/Low

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50V And 800V LLC Designs 100V HB gate driver 50VIN-6VOUT LLC 750-1000W per module ~96-97% full load efficiency ~2000W/in³ power density 80/100V GaN/Si power FETs 20/25V Si power FETs SR drivers Digital controller on back Single matrix transformer Thank you: Rimon Gadelrab and TI HVDC design team HVDC creepage/ clearance 650V GaN power FETs with driver 20/25V Si smart SRs 8 matrix transformers Digital controller High current bus bars Primary FET gate drive isolators Isolated telemetry Isolated bias power 10,000W per module ~94-96% full load efficiency ~2000W/in³ power density 800VIN-6VOUT Stacked LLC Signal isolation

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Protection 50V 800V • Single side protection • 80V/100V power FETs • No isolation barriers VIN=800V Hard output short-circuit VIN VOUT VGS=12V IIN <1µs short circuit protection 800V 50A/div 2μs/div Thank you: TI Power Protection Devices design team • Double sided protection (+/-400V) • SiC power FETs • HSC HS/LS coordination • Integrated isolated bias supply • Integrated isolation for digital telementry and control VIN- VIN- VOUT- VOUT- Optional midpoint

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HVDC is enabling the next generation of server power demands Summary And Call to Action OCP-driven HVDC standards eliminate custom engineering and shorten supplier time-to-market. Best way to get from 800VDC to >1V is not a simple question One clear winner: Vertical Power Delivery (VPD) GaN and SiC power devices are enabling technologies for HVDC Unsung heroes of HVDC include isolated protection, bias supplies, gate drivers, and telemetry • Creepages and clearances • DC-DC converter dimensions • Protection requirements

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Thank You! Any questions?