PDF 原檔：報告_OCP2026_緯穎_鑽石材料直液冷_20261015_original.pdf
講者公開簡報（OCP 官方 Recorded Content 頁提供下載）。文字以 PyMuPDF 逐頁抽取，
### p<n>為頁碼；圖表內容見原檔。
圖片清單（已驗證 2026-10-19）
| 檔名 | 頁 | 分類 | 親眼所見內容 |
|---|---|---|---|
報告_OCP2026_緯穎_鑽石材料直液冷_20261015_p2.png |
p2 | 真資料圖 | 晶片熱通量趨勢（2022 約 100 → 2026 約 200 → 2030 逾 500 W/cm²）與熱阻拆解：冷板 40–45%、TIM 25–40%、晶片 15–25%，冷板加 TIM 占總熱阻 65–85% |
報告_OCP2026_緯穎_鑽石材料直液冷_20261015_p4.png |
p4 | 真資料圖 | 直接接合鑽石微通道於矽晶片的剖面（上蓋／鑽石微通道／Ti-Ni-Au 金屬化層／銦接合層／矽晶片）與四步驟製程：雷射切微通道、鍍金屬化層、銦回焊接合、組裝上蓋 |
報告_OCP2026_緯穎_鑽石材料直液冷_20261015_p9.png |
p9 | 真資料圖 | 銅冷板＋PCM TIM（基準）對直接接合鑽石微通道冷卻的實測比較表：240／300／360 W/cm²（2,000／2,500／3,000 W）下結溫最高 84.3/95.0/106.2°C 對 64.9/70.8/77.1°C，Rth 0.0272/0.0260/0.0254 對 0.0175/0.0163/0.0157 °C/W（360 W/cm² 降 38.2%）；PG25、進水 30°C、2 LPM/kW，兩件實物照 |
原始內容
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Investigation of Diamond-Based Materials for Direct Liquid Cooling of Next-Generation AI Chips Nick Liu Thermal Engineer, Wiwynn Jake Hsieh Assistant Technical Manager, Wiwynn
p2
Rising Chip Heat Flux Demands Lower Thermal Resistance Year 2022 2026 2030 100 W/cm2 Heat Flux 200 W/cm2 Over 500 W/cm2 Background • Advanced packaging may push chip-level heat flux beyond 500 W/cm² • Minimizing Rth is key for next-gen chips Chip TIM Cold Plate TInlet TBase TCase TJunction RCold Plate 40-45% RTIM 25-40% RChip 15-25% Purpose • Cold plate & TIM drive 65–85% of total Rth 1. High-conductivity material lowers RCold Plate 2. Direct bonding reduces RTIM
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Diamond-Based Materials Potentially Improve Performance Material Single Crystal Diamond Diamond Copper Diamond Silicon Carbide Copper Thermal Conductivity (W/m‧K)
2,000 600-900 500-800 ~400 CTE (ppm/K) ~1.0 6.0-9.0 2.0-4.5 ~17.0 Density (g/cm3) ~3.5 5.0-6.0 3.30-3.45 ~8.96 *CTE: coefficient of thermal expansion; SCD: single crystal diamond • Diamond-based materials conduct heat better than copper • Closer CTE match to silicon (CTE ~2.6 ppm/K) enables potential direct bonding • SCD has the highest thermal conductivity, selected as the starting point
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Direct-Bonded Diamond Microchannel on Silicon 4. Assemble Top Lid Silicon Die Bonding Layers Top Lid Diamond Microchannel Bonding Layer (Microscale Indium) Metallization Layers (Nanoscale Ti/Ni/Au stack) Metallization Layers (Nanoscale Ti/Ni/Au stack) Metallization Layers 1. Laser-Cut Microchannels 2. Apply Metallization Layers 3. Reflow Indium for Bonding Experimental Setup Procedure
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Direct-Bonded Diamond Microchannel on Silicon 1. Laser-Cut Microchannels 2. Apply Metallization Layers 4. Assemble Top Lid Laser-cut SCD with microchannels: • Fin width & gap: 0.1 mm • Fin height: 1 mm • Base thickness: 0.5 mm • Microchannel area: 32.2 x 25.7 mm2 Apply metallization layers onto diamond & Si: • Ti — Adhesion • Ni — Diffusion Barrier • Au —Wetting • Reflow indium solder • Controlled temperature & pressure • Bond diamond onto silicon • O-ring seals coolant path • Secure lid onto silicon TTV with screws 3. Reflow Indium for Bonding Experimental Setup Procedure
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Direct-Bonded Diamond Microchannel on Silicon 2. Apply Metallization Layers Metallization Layers • Adhesion: Ti improves metal adhesion to diamond/Si • Diffusion Barrier: Ni prevents solder interdiffusion and reaction • Wetting: Au enhances solder wettability, prevents oxidation Ti/Ni/Au enable reliable, low Rth bonding Experimental Setup Procedure
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Direct-Bonded Diamond Microchannel on Silicon 3. Reflow Indium for Bonding Laser-cut Diamond Microchannels Silicon Die Bonding & Metallization Layers Experimental Setup Procedure
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Direct-Bonded Diamond Microchannel on Silicon 4. Assemble Top Lid Experimental Setup Procedure
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Direct-Bonded Diamond Microchannel Cooling Reduced Over 30% Rth Cooling Solution Copper Cold Plate+ PCM TIM (Baseline) Direct-Bonded Diamond Microchannel Cooling Heat Flux (W/cm2) 240 300 360 240 300 360 Power (W) 2,000 2,500 3,000 2,000 2,500 3,000 Junction Max Temp. (°C) 84.3 95.0 106.2 64.9 70.8 77.1 Rth Junction to Inlet (°C/W) 0.0272 0.0260 0.0254 0.0175 0.0163 0.0157 (-38.2%) Test Conditions: PG25, Inlet 30oC, Flow rate: 2 LPM/kW Silicon thermal test vehicle with 9 Tjunction measurement points recorded (Heating area: 32.2 x 25.7 mm2) • At 360 W/cm², Rth was reduced by 38.2% vs. baseline (59.5% in simulation) • Simulation-test gap likely due to interfacial Rth from non-ideal bonding quality
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Future Work Collaborate with the community and industry to: • Improve bonding quality to lower interfacial Rth • Explore other diamond-based materials and other package-level cooling approaches • Scale up the manufacturing process for next-gen AI chips Learn More • Visit us at Booth C74 to see our demos • Wiwynn’s White Paper: Advanced Microchannel Material - Diamond Composite Thermal Solutions Scan for more Wiwynn’s whitepapers
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