PDF 原檔:報告_MS_AI網通_20260727_original.pdf
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289KB | 真資料圖 | 壓克力展示櫃內的 51.2T CPO 交換機主板實拍:中央大型 switch ASIC,四周環繞光引擎模組與黃/綠色光纖跳線,左側標示「BMC 板」「Controller Board 主控板」中英雙語標籤 |
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336KB | 真資料圖 | 展示櫃內 NPO 交換機模組實拍:中央 switch ASIC,周圍多顆 NPO 光引擎,左側大量黃/藍光纖束,右側標示 CPU 與 BMC 區塊,板面有中文標籤 |
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185KB | 真資料圖 | 壁仞科技投影片:「壁仞 BR2xx NPO 光互連、分布式解耦架構、1024 卡超節點方案」——左側電互連 Cable Tray(櫃內 3 米)、中間 GPU 節點與超節點 SW 陣列的 NPO 光互連拓樸、右側 NPO 光引擎與 UBB 主板實體照,底部標示「單櫃 64/雙櫃 128 卡」與「128 卡→1024 卡 Scale-up 擴展」 |
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532KB | 真資料圖 | 燧原科技(Enflame)展場實拍:背板螢幕投影「燧原 NPO 解決方案」,列三大訴求(突破 IO 佈局範圍/線性直驅、低時延低功耗/面向超節點彈性擴展)與 Scale-Up 網路連結架構圖(SiPh/VCSEL 標註);前方桌上為含光纖跳線的實機 demo 平台 |
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176KB | 真資料圖 | 曦智科技展場實拍:「光²·構建未來數據中心」展示牆,中央機櫃標示 Lightsphere X,兩側延伸標示晶片/光互連相關模組說明卡 |
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95KB | 真資料圖 | Exhibit 14:US semi scale-up TAM estimate($mn)堆疊柱狀圖,深藍 Scale-Out/淺綠 Scale-Up,2024 為 $6bn+$4bn、2029 為 $31bn+$17bn,圖上標註「2024-29e Scale-up CAGR: 34%」 |
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52KB | 真資料圖 | Exhibit 6:中美 AI 產業相對強度雷達圖(藍=China、黃=US),軸向為 Wafer front-end/Chip packaging/Memory: HBM, LPDDR5/Server system/Optical networking/Software optimization (LLM)/AI datacenter space/Power supply/Policy support;Optical networking 兩者幾乎重疊,Wafer front-end 與 Memory 美國明顯領先,Power supply/AI datacenter space/Policy support 中國領先 |
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106KB | 真資料圖(未逐張 Read) | Exhibit 4:AI supernode scale-up solutions 對照表截圖(表格內容已於 trimmed 全文保留) |
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239KB | 真資料圖(未逐張 Read) | Exhibit 13:Chinese CSPs' capex 圖 |
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63KB | 真資料圖(未逐張 Read) | Exhibit 5:Scale-up vs. scale-out networking(來源 Broadcom 2025 OCP Summit Keynote) |
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41KB | 真資料圖(未逐張 Read) | Exhibit 7:中國自研晶片 TCO 與 per token cost 對比 |
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79KB | 裝飾·logo·banner | MS 報告「Asia Summer School 2026」泳池 banner(同款已於貿聯報告逐張 Read 確認) |
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21KB | 真資料圖(未逐張 Read) | Exhibit 1:Scale-up interface data rate per lane |
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22KB | 真資料圖(未逐張 Read) | Exhibit 2:Scale-up bandwidth per accelerator |
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逐張 Read 驗證 7 張(_006/_008/_009/_010/_011/_012/_014),全為真資料圖。★注意:抽圖編號與 trimmed 文中 Exhibit 順序不一致——_010 是壁仞(文中 Exhibit 11)、_011 是燧原(文中 Exhibit 10),嵌入時以本清單為準。
原始內容
M July 27, 2026 09:00 PM GMT
Greater China Semiconductors | Asia Pacific
AI Networking: Scale-up Technology Enables China's AI Supernodes
Following our WAIC takeaways, we further examine China's emerging scale-up landscape, the role of optical interconnect, and implications for the domestic interconnect supply chain.
AI Supernodes enabled by scale-up are becoming the focus of China's AI computing landscape. Alongside our China WAIC takeaways, we provide an indepth follow-up study of China's scale-up technology development. As we wrote in China's AI Accelerators - Who's Poised to Win?, Chinese AI GPUs are strong in optical networking and server rack design at the system level, although they remain constrained by wafer process technology at the chip level ( Exhibit 6 ). These chiplevel constraints are shifting competition in China's AI computing market from standalone chip specs to system solutions. WAIC 2026 featured fewer chip launches and more supernode solutions. Leading domestic accelerator vendors displayed rack-scale or multi-rack supernodes with scale-up domains of 64 accelerators or more, mostly enabled by proprietary scale-up technologies.
China's scale-up landscape is rapidly broadening, led by proprietary fabrics but spanning multiple system architectures ( Exhibit 4 ) . A year ago, our US semis team published Semiconductors: Scaling the AI Opportunity: A Scale-Up Network Primer (29 Aug 2025); China is now catching up quickly in scale-up technology. Huawei remains the domestic scale leader, with Atlas 950 using UnifiedBus 2.0 to connect 1,024 NPUs in the demonstrated configuration and designed to scale to 8,192 NPUs. Biren's next-gen BR2xx NPO architecture targets up to 1,024 GPUs through BLink 2.0. Sugon's scaleX640 connects 640 accelerators in a single rack. Moore Threads'(not covered) MTT C256 supports 128 GPUs in one rack and 256 across two racks through MT-Link 2.0, while MetaX, Alibaba and Enflame support 64- to 128-accelerator domains through MetaXLink-E, ICN, and GCU-LARE, respectively.
Stock implications: We believe Montage (OW, covered by Daniel Yen) is set to benefit from higher PCIe interconnect content in larger, distributed supernodes. As systems scale across racks, denser and longer PCIe links among CPUs, xPUs, switches, NICs and peripherals should support demand for PCIe retimers and PCIe switch chips. We also expect China AI GPU vendors, such as Hygon (OW, covered by Daisy Dai) (along with its ecosystem partner Sugon), Cambricon and Iluvatar (both OW, covered by Charlie Chan), to introduce or leverage scale-up technology to improve their AI server rack performance.
(Continued below.)
Idea
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China AI Interconnect - Scale-up
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Global AI server scale-up technology trend
What is scale-up networking?
Scale-up networking refers to high-speed communication between GPUs/accelerators within the same server or rack. Interconnecting accelerators allow them to function as one large supercomputer, accessing the same memory and processing the same workload. This differs from scale-out networking, which connects multiple systems across a broader data center infrastructure.
Montage's PCIe 6.x/CXL3.x x16 AEC has completed interoperability testing, and targets supernode and inter-rack deployments. Chinese systems deploying more xPUs per unit of compute could further increase PCIe content. Beyond standardized PCIe connectivity, multi-rack scale-up should also accelerate demand for domestic optical interconnect.
Exhibit 1: Scale-up interface data rate per lane
Exhibit 2: Scale-up bandwidth per accelerator

Source: Company data, Morgan Stanley Research

Source: Company data, Morgan Stanley Research
Exhibit 3: US AI networking scale-up technologies
Source: Company data, Morgan Stanley Research
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Exhibit 4: AI supernode scale-up solutions

| Scale-up tech summary | NVIDIA | AMD | AsteraLabs | Huawei | Moore Threads | Sugon | MetaX | Alibaba | Enflame | Enflame | Biren | Biren |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Supernode / accelerator name | GB300 NVL72 (144 dies) | AMDHelios / MI455X | N/A | Atlas 950 SuperPoD | MTT C256 / MTT S5000, PH100 | scaleX640 | Xijing S600 / C600 | Panjiu AL128 / Zhenwu M890 | Yunsui ESL64-O | NPO optical prototype | LightSphere 128 / Bili 166L | BR2xx NPO supernode (announced) |
| Scale-up solution | NVLink 5 + NVSwitch | UALink 1.0 / UALoE | Scorpio X-Series | UnifiedBus 2.0 | MTLink 2.0 | scaleX fabric | MetaXLink and MetaXLink-E | ALink system; M890 implements ICN + ICN Switch 1.0 | GCU-LARE | Undisclosed | Undisclosed | Blink 2.0 |
| Technology foundation | Proprietary | Ethernet PHY-based, memory-semantic UALink fabric | PCIe Gen6 | Proprietary | Proprietary | Open multi-vendor system architecture | Proprietary | Supports proprietary protocol and UALink | Proprietary | Undisclosed | SiPh OCS | Proprietary |
| Singal lane speed | Physical-lane rate N/A; 100GB/s per NVLink 5 link | 200Gb/s per lane; 212.5GT/s raw signaling rate | Undisclosed | 106.25Gb/s PAM4 under UB2.0 specification | 112Gb/s per lane | Undisclosed | Undisclosed | 112G/224G SerDes supported at AL128 platform level | Undisclosed | Undisclosed | Undisclosed | Undisclosed |
| Total bandwidth per accelerator | 1.8TB/s | 3.6TB/s | Undisclosed | 2TB/s | 800GB/s | Undisclosed | Undisclosed | 800GB/s | Undisclosed | Undisclosed | Undisclosed | Undisclosed |
| Total accelerator units in supernode | 72 | 72 | Up to 80 per switch (merchant solution) | 1,024 NPUs demonstrated / 8,192 NPUs announced | 128 GPUs in one rack; 256 GPUs across two racks | 640 | 64 GPUs in S600 rack; 128 GPUs through C600 MetaXLink-E | 128 per rack; 64 per disclosed full- bandwidth ICN domain | 64 | 512-plus | 128 | 1,024 |
| Phyical inferface | Pasive copper; NVLink cable-cartridge / backplane | Electrical/copper | Electrical/copper | Hybrid: orthogonal cableless electrical interconnect intra-rack; optical interconnect inter-rack | All-copper Cable Tray | Electrical/copper | Cabless OEX electrical interconnect | Backplane-free orthogonal electrical; NPC interconnect | Cabless OEX electrical interconnect | NPO optics | SiPh optical circuit switching supplied by Lightelligence | NPO optics |
| Copper cable | Yes | Yes | Yes | No (cableless) | Yes | Undisclosed | No (cableless) | Yes | No (cableless) | No | No | No |
| CPO | No for scale-up (Yes for scale-out) | No | No | Undisclosed | No | Undisclosed | No | No | No | No | No | No |
| NPO | No | No | No | Undisclosed | No | Undisclosed | No | No | No | Yes | No | Yes |
Source: Company data, Morgan Stanley Research
Exhibit 5: Scale-up vs. scale-out networking

Source: Broadcom 2025 OCP Summit Keynote, Morgan Stanley Research
China AI server scale-up development
In China, electrical interconnect remains the preferred option within racks, while optical becomes more important as scale-up domains extend across racks . Short electrical links offer lower cost and simpler integration within boards, trays and singlerack systems. Moore Threads' C256 uses an all-copper cable tray design, while the orthogonal zero-cable architectures by Enflame and MetaX also remain electrical. Optical interconnection becomes more attractive across racks, where copper reach, signal loss and power consumption become constraints. Huawei's Atlas 950 SuperPoD extends UnifiedBus across racks within the same SuperPoD using optical interconnect.
The transition toward optical connectivity may create demand for domestic switching and optical engine solutions designed for AI systems. At WAIC 2026, Lightelligence (not covered) showcased its new NPO/CPO switch solutions ( Exhibit 8 , Exhibit 9 ), which pair the switch ASIC from a leading domestic vendor, which we believe is Centec Communications (not covered), with Lightelligence's optical engine, including the SiPh PIC and selected EICs such as the TIA. The NPO/CPO solutions shorten the high-speed
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electrical path between the switch ASIC and optical engine, improving bandwidth density and power efficiency, while NPO retains greater serviceability than CPO. The same architecture can serve both scale-up and scale-out networks, with scale-up becoming increasingly relevant as tightly coupled accelerator domains extend across racks.
More broadly, scale-up is emerging as the principal area of architectural differentiation, while scale-out remains the backbone of large-scale clusters . System solutions generally use a specialized fabric to connect accelerators within a supernode, and Ethernet-based fabrics such as RoCE or UBoE, or Infiniband to connect multiple supernodes across a cluster. NVIDIA combines NVLink with InfiniBand or Spectrum-X Ethernet; AMD Helios pairs UALink with Ethernet scale-out; Huawei uses UnifiedBus within the SuperPoD, and UBoE or RoCE for scale-out between SuperPoDs.
Exhibit 6: Relative strengths of AI industries in the US and China - optical networking almost on par

Source: Morgan Stanley Research
Exhibit 7: Domestic chips have lower TCO and comparable per token cost (AI LLM inference) vs. NVIDIA's processors for China

TCO of 10MW capacity (US$ mn)
Per token cost (US$ cent) (Right-axis) (Lower is better)
Source: Company data, Morgan Stanley Research estimates
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Optical interconnect is progressing towards scale-up system deployment
Enflame and Lightelligence previously demonstrated an xPU-CPO prototype that places the optical engine beside the accelerator, enabling direct optical output from the xPU and reducing the electrical distance between the compute silicon and optics. At WAIC 2026, Enflame displayed an NPO-equipped GPU-server solution targeting scale-up domains of 512 accelerators or more, developed in partnership with Lightelligence ( Exhibit 10 ). Biren also unveiled a next-gen BR2xx-based NPO architecture designed to support a scale-up domain of up to 1,024 GPUs ( Exhibit 11 ). Also, LightSphere X (jointly developed by Lightelligence, Biren, ZTE, and other partners) incorporates Lightelligence's SiPh interconnect and dOCS technology, enabling the accelerator domain to extend across racks and allowing the topology to be reconfigured according to workload requirements ( Exhibit 12 ). These projects show domestic optical technology being integrated at both the accelerator optical-I/O layer and the distributed optical-switching layer, to support larger, multi-rack scale-up domains.
Source: Company data, Morgan Stanley Research
Exhibit 8: 51.2T CPO switch module (displayed by Lightelligence)
Exhibit 9: NPO switch module (displayed by Lightelligence)

Source: Company data, Morgan Stanley Research

Source: Company data, Morgan Stanley Research
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Source: Company data
Exhibit 12: LightSphere X (Lightelligence)

Source: Company data, Morgan Stanley Research
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Exhibit 13: Chinese CSPs' capex will be a key demand driver for Chinese AI GPUs
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Source: Company data, Morgan Stanley Research
Exhibit 14: US semi : Scale-up TAM estimate ($mn)

Source: Company data, Morgan Stanley Research (E) estimates
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Valuation Methodology and Risks
Montage Technology Co Ltd (6809.HK)
Base case, residual income model. Key assumptions:
- n 8.4% CoE (1.2 beta, 3.0% risk-free rate, and 4.5% risk premium)
- n 30% payout ratio
- n 19.3% medium-term growth rate
- n 4% terminal growth rate
These assumptions reflect cloud capex growth, DRAM interface technology migration, and Montage's strong position in China's datacenter semi localization. We then apply an exchange rate of 1.15 HKD:1 RMB, assuming no H-share discount vs the A-share.
Risks to Upside
- n Faster-than-expected phase-out of US peers
- n Faster-than-expected spec migration
Risks to Downside
- n Weaker-than-expected cloud demand
- n Slower-than-expected DRAM interface technology migration
- n Delay in new product launches
Montage Technology Co Ltd (688008.SS)
Base case, residual income model. Key assumptions:
- n 8.4% CoE (1.2 beta, 3.0% risk-free rate, and 4.5% risk premium)
- n 30% payout ratio
- n 19.3% medium-term growth rate
- n 4% terminal growth rate
We believe these assumptions are justified, given the cloud capex growth, DRAM interface technology migration, and Montage's strong position in China's datacenter semi localization.
Risks to Upside
- n Faster-than-expected phase-out of US peers
- n Faster-than-expected spec migration
Risks to Downside
- n Weaker-than-expected cloud demand
- n Slower-than-expected DRAM interface technology migration
- n Delay in new product launches
Hygon Information Technology Co., Ltd. (688041.SS)
We assume an 8.0% cost of equity (beta 1.05, risk-free rate 2.0% and risk premium 5.8%), a payout ratio of 50%, a medium-term growth rate of 25.0%, and a terminal growth rate of 5.0%, all of which are in line with other China AI chip companies under our coverage.
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Risks to Upside
- n Hygon further differentiates itself from local CPU and GPU competitors and gains significant market share in China's CPU and GPU markets
- n China AI demand is stronger than expected
- n Faster ramp-up of leading node capacity
Risks to Downside
- n Intensified pricing competition among local GPU companies
- n China AI demand is weaker than expected
- n Slower yield improvement and capacity buildout at local leading node foundries
Cambricon Technology Corporation (688256.SS)
Key valuation assumptions underpinning our model include: an 8.4% cost of equity (derived from a beta of 1.06, risk-free rate of 2.0%, and equity risk premium of 6.0%), a long-term payout ratio of 40% (was 57%), a medium-term growth rate of 16%, and a terminal growth rate of 6.0%.
Risks to Upside
- n Stronger-than-expected AI demand
- n CSP order ramp-up
- n Accelerating localization
Risks to Downside
- n Capacity and yield constraints
- n Customer concentration risk
- n Slower technology iteration
Iluvatar CoreX Semiconductor Co., Ltd. (9903.HK)
Key valuation assumptions include:
- n An 8.3% cost of equity (derived from a beta of 1.05, risk-free rate of 2.0%, and equity risk premium of 6.0%)
- n A long-term payout ratio of 34% (was 33%)
- n A medium-term growth rate of 16%
- n A perpetual terminal growth rate of 6%
Risks to Upside
- n Stronger-than-expected CSP orders
- n Faster CUDA replacement with Iluvatar's software
- n Expansion of overseas and domestic capacity
Risks to Downside
- n Order ramp below expectations
- n Escalation of sanctions
- n Intensifying competition
Idea
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Disclosure Section
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