research_垂直供電VPD公開資料_20261003

為 垂直供電VPD深度解析_20261003.pdf 所做的 web research。搜尋入口 agy（Antigravity CLI）六路 grounded 搜尋；下列各來源皆以瀏覽器開啟原頁親讀，摘錄為原文關鍵段落（英文保留原文）。未親讀、僅靠 agy 摘要的數字在 lib／報告中標「待核」。 圖片：web_Infineon_TDM2454xx四相VPD模組_20250310.jpg、web_Infineon_TDM22544D雙相模組_20250828.jpg、web_Empower_Crescendo_VPD平台_20241002.png、web_Murata_iPaS_img0002~0008.png、web_Flex_VPD_drawing_2025.png、web_Flex_VPD_module_2025.png（皆原廠圖，已 Read 驗證）。

1. Vicor — Vertical power delivery enables cutting-edge processing（Ajith Jain, VP WW Computing）

• "Peak current demands of up to 2,000A are now a typical requirement."
• LPD: "two current multipliers (Vicor VTM modules) flank the north and south side or the east and west side of the processor. This technique is preferable for load currents of ~800A at 0.8V nominal with an associated 70µΩ of PDN at 100°C. Using these numbers, we can compute ~45 W of power loss. A heat sink covering both the 2.8-mm-tall current multipliers and the processor…"
• LVPD: "Only 70% of the power is delivered laterally… An additional current multiplier on the bottom side of the processor delivers the remaining 30%… reduces PDN loss by almost a factor of four! This technique also frees board space to accommodate a second high-current rail (aux) or HBM memory rails."
• VLPD: "pushes >50% of the load current through additional current multipliers on the bottom side… A 1,200A design can now realize a PDN resistance of a mere 10 µΩ, resulting in fewer than 14.4W of power loss… especially effective for applications that must accommodate high-speed signal routing from the periphery of the ASIC… Examples are CPO, NPO and networking."
• VPD: "current multipliers and bypass capacitors are stacked on each other to form an integrated power module (geared current multiplier) that can mount directly underneath the processor by displacing the bypass capacitor bank. Vicor GCMs are custom-built devices that map the current multiplier pinouts to the AI processor BGA…"
• "Vicor architectures can reduce motherboard resistances up to 50x and processing power pin count more than 10x."
• OCP Open Rack V2.2: 48V backplane、48V OAM。

2. Infineon 新聞稿

• INFPSS202503-073（2025-03-10）：OptiMOS TDM2454xx quad-phase "enable true vertical power delivery (VPD) and offer industry's best current density of 2 Ampere per mm²… follow the OptiMOS TDM2254xD and the OptiMOS TDM2354xD dual-phase power modules introduced by Infineon last year… fusion of OptiMOS 6 trench technology, chip-embedded package… low-profile magnetic design… footprint designed to enable module tiling… support up to 280A across four phases with an integrated embedded capacitor layer within a small 10x9mm² form factor. Combined with Infineon's XDP™ controllers". 新聞圖為 TDM24545S。
• INFPSS202508-138（2025-08-28）：Infineon–Delta "strengthening of its existing collaboration… high-density power modules capable of enabling vertical power delivery to AI processors… leverages Infineon's ultra-thin silicon (MOSFET) chip technology and embedded packaging expertise, as well as Delta's industry-leading power module design and manufacturing… vertical power delivery modules in comparison to a lateral mounted discrete solution can save up to 150 tons of CO2 over an expected lifetime of three years per rack… Infineon's OptiMOS™ silicon-based 90 A integrated power-stage solution is being utilized by Delta to develop VPD modules… next-generation power delivery solutions for AI data centers that will require 1 megawatt (MW) per rack". 新聞圖 TDM22544D。
• inftn202609-136（2026-09-07）：TDA235E5／TDA235E0 "dual-phase smart power stage family… OptiMOS™ 6 MOSFETs and a dual-phase driver IC in a compact 6 x 6 x 0.8 mm³ package… power density exceeding 2 A/mm²… up to 300 A peak current and 120 A total design current (TDC)… Both lateral and vertical power delivery configurations are supported… Superior thermal impedance from junction to top side enables efficient liquid cooling integration… Engineering samples… now available".

3. MPS MPC24380-260 產品頁（Pre-Release）

• 260A Four-Phase Intelli-Module with Quiet Switcher Technology；Vin 3–8V、Vout 0.5–2V、Iout 260A、fsw 500–1500kHz、9×10mm、H 5mm、LGA-54、Open Frame；Accu-Sense CS、Temperature Sense、Tri-State PWM、OCP／OTP、Fault Reporting。
• 同系列：MPC22175-130（Dual-Phase TLVR Intelli-Module）、MPC22157-130（Double-Side Cooling）、MPC22158-130（8×8×4mm）、MPC22165-A-170（9×9.9×10mm 170A）、MPC24180-260。
• MPS 文章摘要句："current demands that now frequently reach the 1000A to 2000A threshold per socket."

4. Empower Semiconductor — Crescendo（2024-10-02）

• "FinFast™-based Crescendo vertical power platform… scalable on-demand true vertical power delivery for upwards of 3,000A power domains… nanoseconds transient response."
• "traditional lateral power solutions operate slowly, creating a large footprint of bulky power stages and magnetics on the topside of the PCB. The slow speeds also require large capacitor banks in the shadow of the processor…"
• "Crescendo eliminates the capacitor bank… ultrathin thermally enhanced package fit in the critical area under the processor…"
• Key benefits: 20x higher bandwidth（省 PCB 高頻去耦電容）；5x higher total solution density、"truly vertical power delivery in 1mm or 2mm of height"；">10% reduction in power delivery losses… 100,000 CPU instances… >8-megawatt (MW) reduction"；"integration of power delivery directly into the processor at total power supply densities exceeding 5A/mm2"。首展 2024 OCP Global Summit。

5. Ferric — Fe1766（2025-08-25）

• "Fe1766 delivers 160 A from just 35.5 mm² of silicon, with a fully integrated inductor — small enough to sit directly within the processor package – while supporting a scalable vertical PDN architecture capable of kilowatt-class delivery."
• 網站 Integrations：Back Side PCB Attach、Land Side Package Attach、Substrate Embedded、Die Side Package Attach。
• 2025-06-17 "Ferric and Marvell announce collaboration on Integrated Voltage Regulators"。

6. Murata iPaS 技術頁 ＋ The Elec（2026-09-10）

• Capacitor iPaS："fusion of Murata's conductive polymer aluminum electrolytic capacitor technology and multilayer board technology… thin sheet form with a thickness of 0.3 to 0.35 mm… features a through-hole internally, while flat copper electrodes on both surfaces enable laser via connections… array structure design allows customization… impedance characteristics, size, circuit routing, and footprint"；"internally formed through-hole, which minimizes the current path and keeps the ESL low. It also handles high currents, making it ideal for Vertical Power Delivery (VPD)"；應用 "power module substrates and package substrates for high-performance semiconductors requiring high currents (>100A)"。
• Inductor iPaS："arranging multiple coils wound flat in parallel and embedding them within the substrate… power inductor capable of handling currents exceeding 10A… closed magnetic circuit design… ICs mounted directly on the substrate, enabling low-profile module designs"；應用 "power module substrates for AI accelerators and optical transceivers"。
• 路線："Currently, we are developing the capacitor iPaS and the inductor iPaS separately. However, our future goal is to integrate both components onto the same substrate."
• The Elec：Murata "plans to begin mass production next year of its Integrated Package Solution (iPaS)… Major customers are expected to be big tech companies… 'It is a high-priced product… It should be in mass production next year'… first unveiled samples at FLEX Japan in 2023 and demonstrated a power module using iPaS at ECTC in 2024. The module reduced the number of surface-mounted capacitors by more than 60% while maintaining voltage fluctuation characteristics similar to conventional designs… targeting annual sales of 50 billion yen within 18 months of mass production… about 5% of its capacitor sales of 936.4 billion yen in fiscal 2025."

7. Samsung Electro-Mechanics — Silicon Capacitor Lineup（2026-06-17）

• 優勢：Ultra-Thin；Low ESL "under 1pH"；"stable performance even under extreme environments of 250℃ or higher"。
• "currently mass-producing 4 types… total lineup of 9 variants, including 5 lineups of promotional samples."
• 型號表（節錄）：SCBCAP305L95EGNNWT 樣品 1.26×1.03mm／68µm／3000nF／4 rails／1.2V／LSC；SCBCAP514L95AGNNNT MP 70µm／512nF；SCG98P105M86AGNNWT MP 0.96×0.88／60µm／1050nF；SCHVSP107MH1AGB9WT MP 11.01×8.35／750µm／103,950nF／198 rails／DSC；Embedded 型 SCRLLC885MG5EGNNWT 2.00×2.00／738µm／8800nF、SCRNKC166MG5EGNNWT 4.06×2.00／17,600nF、SCRNNC326MG5EGNNWT 4.02×4.02／35,000nF。
• 同頁其他文章：Low-Profile / Embedded MLCCs（2026-09-16）、Capacitor Solutions for 1MW Racks（2026-09-16）。

8. Wiwynn Computex 2026（2026-05-26）

• "6kW Double-sided Cold Plate with Liquid Metal TIM: Designed to support AI ASICs up to 6kW, this ultra-thin, double-sided liquid cooling solution integrates cavity PCB architecture to support Vertical Power Delivery (VPD), shorten power delivery paths and improve power delivery efficiency by more than 80% in a compact environment. With Liquid Metal TIM significantly reducing silicon-to-cold plate temperature differentials, the solution delivers over 30% gains in thermal efficiency."
• HVDC：與 Delta、TE 展 800VDC 機櫃、液冷 busbar、800V→50V PDB；CPO 與 Ayar Labs／GUC；Diamond Composite 微流道冷板。

9. Power Electronics News

• Discrete VPD（2026-05-08, Stefano Lovati）："the VPD method delivers power at a higher voltage, typically 48 V. The final conversion… directly under the processor package"；"fully integrated approaches, which include BSPDNs and IVRs, offer the lowest possible parasitics"；離散模組 "BGA designed to match the pin-map of each xPU/ASIC"；Vicor PRM "peak efficiencies up to 99%"、VTM "efficiency up to 97%, sub-microsecond transient response"；Infineon TDM2454xx 280A／2.0 A/mm²；Flex "VPD solutions range from 1-25 rails distributed on up to 288 phases"、Flex–Renesas 合作；AmberSemi PowerTile "20 x 24 x 1.68 mm… 1,000 A… combined to supply over 10,000 A"；ADI LTM3360B "33 A… 6.55 mm × 5 mm… 1 A/mm²… up to 12 phases… over 1,000 A"。
• Lotus Microsystems（2026-08-24）："a 100 µΩ path carrying 1,000 A would dissipate 100 W"；LSC0580 "9×9 mm power-system-in-package (PSiP) takes a 2 to 5 V input and produces a 0.5 to 1.2 V output, with peak efficiency of up to 96 percent"；Power Interposer Technology（矽中介層）＋LTG thermal guide；"roadmap toward architectures below 1 mm"；"Engineering samples are scheduled for Q3 2026"。

10. SemiWiki — TSMC A16 at VLSI 2026（2026-07-10）

• "Paper T1.5 at the June 2026 IEEE/JSAP VLSI Symposium… Super Power Rail, or SPR… backside direct-contact power delivery scheme… Compared with N2P… 8–10% higher speed at the same power, or 15–20% lower power at the same speed, plus 8–10% chip-density gain, with mass production slated for Q4 2026."
• "A16-SPR as using backside direct-contact power delivery, front/back-side metals, and 3D MIM capacitors"；"preserves N2P gate density and NanoFlex DTCO benefits"。

11. Intel PowerVia（2023-06-05）

• Blue Sky Creek（Intel 4 電晶體＋PowerVia，E-core）："demonstrates >5% frequency improvement and >90% cell density with acceptable debug times as Intel 4."
• "The wires for power… can take up to 20% of that front-side real estate… the two-part flip-it-over process is actually cheaper than the old way."
• 熱："Do we have a thermal problem?… the answer: no."；原規劃 20A（2024）、18A 供 Foundry 客戶。

12. Analog Dialogue — TLVR（2023-02）

• "A TLVR inductor can be regarded as a 1:1 transformer that possesses a primary winding and a secondary winding. The coupling of all TLVR inductors is realized by connecting the secondary windings of all TLVR inductors… the output current of all phases can ramp up or down at the same time once the duty cycle of one phase changes."
• 缺點："high circulating current in the secondary side… an additional inductor Lc should be added to limit the circulating current… further increases the system loss and cost"；變壓器式 VR＋TLVR 可省 Lc。

13. Flex Power Modules — VPD 頁

• Benefits："Huge reduction in board space… Reduced PDN losses… Lower parasitic path… Ball grid array designed to directly match the pin-map of each xPU/ASIC… Customized profile, scalable multi-rail solutions… Modular designs offer ease of manufacturing and vendor flexibility".

14. SemiAnalysis（2023-08-01，公開段落）

• "Google was the first hyperscaler to adopt 48V power in their datacenters around 2016 and pushed for the 48V to be standardized in the OpenCompute consortium."
• "Vicor's first mainstream merchant silicon design win was Nvidia's V100 SXM3 refresh in 2018… Then came the A100, and the entire lineup used Vicor parts… Google also adopted Vicor for the TPU in a similar time frame"；"Vicor was designed out in the H100, replaced by Monolithic Power Systems (MPS)"；Vicor 對競爭者提告。

15. agy 摘要未親讀（標「待核」）

• Infineon 2024-10 新聞稿：TDM2354xD／T 160A、8×8mm、1.6 A/mm²、TLVR 整合。
• imec 文章：BPR 單獨改善動態 IR drop ~26%、BPR＋BSPDN ~7 倍；nTSV 200nm pitch；TTV <40nm；穿矽對位 <10nm。
• Intel APEC 2014 FIVR：140MHz、峰值效率 88–90%、最多 31 個電壓域、16 相。
• Empower E-CAP：密度 MLCC 5 倍、50µm、ESL <5pH、EC2005P 9.34µF／EC2006P 36.8µF。
• Vicor Hydra II：MCD4609＋2×MCM4609 650A 連續／1,200A 峰值、45.7×8.6×3.2mm。
• EPC EPC9159 1kW 48V→12V LLC 峰值 98%；TI PMP41150 HSC 1000W。
• 永豐／SemiAnalysis VR200 相數 24–32 相推估：無官方數字。