報告_Daiwa_欣銓3264首次覆蓋_20260909

PDF 原檔：報告_Daiwa_欣銓3264首次覆蓋_20260909_original.pdf

原始內容

Taiwan

Ardentec (3264 TT)

Ardentec

Target price:

TWD340.00

Share price (9 Sep): TWD233.00 | Up/downside: +45.9%

Initiation: an emerging force in AI/HPC testing

• Longtan buildout propels AI/HPC inflection and gross margin leverage
• Pure testing captures ASIC growth and order spillover from peers
• Initiating coverage with a Buy (1) call and 12M TP of TWD340

Investment case: We initiate coverage of Ardentec, a Taiwanese pure testing provider serving foundries, IDMs and fabless chipmakers, with a Buy (1) rating. We believe Ardentec is transitioning from an auto/industrial test vendor into an AI/HPC wafer-sort powerhouse, supported by a 35% revenue CAGR (2025-28E) and gross margin expansion to 45% by 2028E.

Longtan fab ramp with premium hourly rate . We expect the 7-story Longtan mega-fab, which is developing at one floor per quarter to deliver significant revenue contribution (c.TWD450m+/quarter per floor). We believe this underpins a structural upgrade in revenue, as advanced wafer sorting for application-specific integrated circuits (ASIC) commands an hourly billing rate nearly double that of legacy testing. Furthermore, we believe strategic collaborations with key Taiwan foundry leaders position Ardentec to capture expanding AI/HPC test allocations moving forward.

Gross margin increase driven by high utilisation rate. As its key peers prioritise merchant AI GPUs, displaced mobile/RF/networking orders are refilling Ardentec's fully depreciated tester lines, lifting mature utilisation. Test-time inflation (2-3x on complex ASICs) anchors Longtan capacity at a 90%+ utilisation rate. As fixed costs comprise 40-45% of COGS, this drives blended gross margin from 36% in 2025 to 45% in 2028E, with steady operating expense (9-10% of sales) flowing into operating profit.

Turnkey E/O testing for CPO and non-dilutive expansion. Leveraging synergies with Giga-Solution, Raytek (7873 TT; 25% stake), and strategic partner Fabrinet (FN US, NR), Ardentec builds a comprehensive electrooptical test flow aligned with TSMC's compact universal photonic engine (COUPE) platform. While co-packaged optics (CPO) testing accounts for <5% of near-term sales, it secures an early-mover moat in optical I/O.

Catalysts: 1) Completion of 7-floor capacity with premium rates and higher UTR; 2) peer spillover orders refilling fully depreciated capacity, expanding gross margin; 3) higher-than-expected ASIC and CPO contribution.

Valuation: Driven by a structural earnings inflection fuelled by Longtan fab expansion, expanding AI ASIC test pricing premiums, and high-margin peer spillover orders, we initiate Ardentec with a Buy (1) rating and 12-month TP of TWD340, based on a target PER of 25x applied to our 4-quarter-forward EPS, at the top end of its historical 10-25x range but supported by a 48% 2025-28E EPS CAGR and peer AI test valuations of 18-24x.

Risks: 1) Delays in capacity expansion; 2) pricing pressure as a second supplier; and 3) slow automotive and industrial recovery.

9 September 2026

4

Daiwa

5

3

2

1

Buy

Leon Chen

Leon Chen (886) 2 8758 6247

leon.chen@daiwacm-cathay.com.tw

Stacy Lin (886) 2 8758 6252 stacy.lin@daiwacm-cathay.com.tw

Financial summary (TWD)

Source: FactSet, Daiwa forecasts

Table of contents

Ardentec (3264 TT): 9 September 2026

Daiwa

valuation carnings revisions

5

Daiwa

4

Growth outlook

We forecast Ardentec to enter a structural multi-year revenue growth cycle, rising from TWD14.0bn in 2025 to TWD34.4bn by 2028E, implying a 34.8% CAGR. This revenue growth is supported by the phased ramp-up of its Longtan fab facility, increasing exposure to premium AI ASIC and HPC wafer testing, and broad-based ASP expansion driven by tighter mature-node test capacity. Meanwhile, we expect improving utilisation coupled with growing contributions from fully depreciated legacy testers, to drive gross margin expansion from 36.3% in 2025 to 45.0% by 2028E.

Valuation

Given the current structural mix transition from cyclical automotives towards high-margin AI/HPC custom ASICs, amplified gross margin and operating leverage from the Longtan ramp, and ROE inflection likely to surpass its 2022 historical peak of c.23% over 2026-28E, we initiate coverage of Ardentec with a Buy (1) rating and 12-month TP of TWD340, based on a target PER of 25.0x applied to our 4-quarter-forward EPS, at the top end of its historical 10-25x range but supported by a 48% 2025-28E EPS CAGR and peer AI test valuations of 18-24x.

Earnings revisions

Bloomberg consensus raised its 2026-27E EPS estimates by 30-45%, driven by the rapid Longtan Floor 1 ramp, premium ASIC hourly rates, and high-margin peer spillover orders. The upward revisions likely reflect the completion of the remaining floors, test-time inflation driving higher testing hours, and internal capacity tightness unlocking pricing power across mature lines. Ardentec is currently covered by 4 brokers. We believe the market is overlooking this stock despite its structural fundamental turnaround outlook and depressed valuation.

Ardentec: revenue and gross margin outlook

Source: Company, Daiwa forecasts

Ardentec: 1-year-forward PER bands

Source: Bloomberg

Ardentec: Bloomberg-consensus earnings revisions

Source: Bloomberg

3

2

1

Ardentec (3264 TT): 9 September 2026

Financial summary

Key assumptions

Profit and loss (TWDm)

Cash flow (TWDm)

Source: FactSet, Daiwa forecasts

Ardentec (3264 TT): 9 September 2026

Daiwa

Financial summary continued …

Balance sheet (TWDm)

Key ratios (%)

Source: FactSet, Daiwa forecasts

Company profile

Kinsus was founded in 2000 as a subsidiary of Asustek. The company mainly focus on niche ball grid array (BGA) substrates to avoid price competition among mainstream products like graphics card and chipsets, and it has become top-3 flip chip manufacturer in global. Besides, its manufacturing sites are based in Taiwan and China.

Ardentec (3264 TT): 9 September 2026

Daiwa

Independent tester benefiting from dualsourcing demand and automotive-grade expertise

Ardentec: revenue by product

Source: Company, Daiwa forecasts

Ardentec (3264 TT): 9 September 2026

From Automotive to AI/HPC growth engines

A premier pure play in wafer testing

Founded in October 1999 and headquartered in Hukou, Hsinchu, Ardentec Corporation is a premier semiconductor testing pure play, ranking among the top three pure test service providers in Taiwan in terms of revenue. While semiconductor testing is inherently a capital- and technology-intensive arena dominated by foundry and integrated OSAT titans such as TSMC (2330 TT, TWD2,465, Buy [1]; covered by Daiwa analyst Rick Hsu) and ASE Group (3711 TT, TWD640, Outperform [2]; covered by Daiwa analyst Rick Hsu), Ardentec establishes a resilient, differentiated market presence through two structural pillars:

• Strategic dual-sourcing anchor and supply chain balancer. As advanced packaging and testing capacity is increasingly centralised within leading foundries and megaOSATs, tier-1 fabless leaders actively de-risk operations by qualifying secondary sources. Ardentec functions as an independent, pure-play testing alternative, providing foundry-aligned engineering standards alongside commercial flexibility. This positioning allows tier-1 chipmakers to diversify vendor concentration, secure dedicated capacity allocations during cyclical tight supply, and mitigate single-point manufacturing bottlenecks.
• Technical versatility supported by automotive qualification standards. Ardentec maintains a high revenue exposure to automotive and industrial IC testing - sectors that demand zero-defect reliability, ultra-wide temperature ranges, and complex mixed-signal test protocols. This operational baseline provides significant cross-application versatility. During automotive cycle downturns, qualified test cells and probe architectures can be reconfigured to support compute, edge AI, and high-frequency communication ICs, helping dampen gross margin volatility and stabilising baseline fleet utilisation across broader semiconductor cycles.

Ardentec: revenue by application

Source: Company

Longtan: seven-floor mega-fab to scale AI

Spanning seven vertical cleanroom floors, the company's Longtan facility began a multiyear construction timeline starting in 2026, manufacturing semiconductor chips for tier-1 foundry customers. Management confirmed Floor 1 achieved commercial mass production in 3Q26; its +15% MoM revenue inflection in July validated the expansion. At peak utilisation, we estimate each fully loaded floor will generate c.TWD150m per month (TWD 400-500m quarterly) in revenue. With tooling and equipment installations tracking a predictable one-floor-per-quarter cadence, each incremental floor can accommodate a maximum of 100 high-end automated test equipment (ATE) platforms.

Daiwa

Ardentec: capacity expansion

Source: Company, Daiwa forecasts

Displaced mobile and networking orders refill legacy testing capacity

Ardentec (3264 TT): 9 September 2026

Daiwa

Commanding an hourly billing rate nearly double that of legacy CP testing (95-100% premium over legacy CP testing), we estimate each newly commissioned floor will drive the company's top line by 8-10%. We believe this rapid deployment will transform AI/HPC sorting from an ancillary segment into Ardentec's primary growth engine and top-line contributor over our forecast horizon.

While Floor 1 capex was self-funded to fast-track qualification, subsequent floor expansions are transitioning toward customer-consigned tester models, which will reduce balance sheet risk and secure committed wafer allocation. We believe the fleet is customtailored for leading US hyperscaler ASIC roadmaps. By locking in application-specific test setups and eliminating idle downtime associated with frequent load-board changeovers, Ardentec is able to achieve industry-leading throughput, uncompromised test cell efficiency, and maximised asset turns, per management.

Ardentec: revenue contribution from its Longtan Fab

Source: Company, Daiwa forecasts

Proprietary accelerator roadmaps across cloud service providers (CSP) - including AWS Trainium/Inferentia, Meta MTIA, and Microsoft Maia - feature starkly heterogeneous probe card architectures, thermal docking requirements, and test firmware protocols. We believe the modular, multi-story footprint at the company's Longtan facility provides the physical isolation necessary to construct dedicated, IP-secure production cleanrooms for multiple hyperscaler customers. As custom AI ASIC testing accounts for a rapidly expanding share of the company's revenue mix relative to legacy automotive exposure, we believe this structural diversification serves as a strong catalyst for a rerating for Ardentec towards tier1 compute OSAT multiples.

Broad-based UTR inflection on peer capacity spillover

While automotive and consumer segments navigate cyclical normalisation, Ardentec's nonAI capacity is staging a powerful recovery, per management. Based on our channel checks, its key OSAT peers (eg, KYEC: 2449 TT, not rated) have aggressively reallocated leading-edge test fleets toward mega-cap merchant AI GPUs, creating severe capacity bottlenecks for mobile application processor (AP), radio frequency (RF), and networking IC designers (such as MediaTek - 2454 TT, TWD4,625, Buy [1], covered by Rick Hsu). Therefore, Ardentec is capturing these high-volume, displaced wafer sorting (or chip probing, CP) and final test (FT) allocations. This order influx swiftly rebounds mature and communication line utilisation rates from trough levels (below 65%) back toward the 80%+ threshold, turning legacy capacity into a high-cash-generation baseline with zero asset drag.

Semiconductor testing carries a high fixed-cost structure heavily weighted toward equipment depreciation and engineering overhead. Historically, once aggregate corporate UTR crosses the critical 65% fixed-cost absorption threshold, incremental revenue drops directly to the bottom line with minimal variable costs (primarily power and consumables).

CPO and silicon photonics testing positions Ardentec for the next growth phase

Ardentec (3264 TT): 9 September 2026

Daiwa

Advanced-node ASICs feature extreme sensitivity to thermal dissipation and signal integrity, causing per-wafer test time to expand by 2-3x relative to standard logic ICs. This structural test-time inflation anchors Longtan's advanced ATE fleet at an optimal 90+% theoretical UTR ceiling. With legacy lines refilled by spillover orders and the new Longtan facility rapidly ramping up, we believe Ardentec is entering the steepest phase of its operating leverage curve over 2026-28E.

Source: Company, Daiwa forecasts

Next-gen CPO and silicon photonics testing

Beyond the immediate custom ASIC cycle, Ardentec is securing its next structural growth frontier through advanced co-packaged optics (CPO) and silicon photonics (SiPh) waferlevel testing. As hyperscale AI clusters push copper interconnects to physical transmission limits, the industry is transitioning towards optical I/O, which requires testing to shift from purely electrical verification to complex electro-optical (E/O) wafer sorting (CP). Unlike standard digital logic testing, optical probing demands sub-micron automated fibre alignment, precise laser wavelength calibration, optical power loss measurement, and specialised thermal-stability testing across photonic integrated circuits (PIC) and electronic integrated circuits (EIC) before advanced heterogeneous integration.

Ardentec: CPO development

Source: Ardentec

Ardentec's core competitive edge in optical testing stems from its strategic intra-group synergies with subsidiaries Giga-Solution Tech and Raytek Semiconductor (7873 TT; Ardentec holds a 25% share), and strategic cooperation with Fabrinet (FN US, NR).

While Ardentec commands high-volume, foundry-grade wafer sort automation, GigaSolution contributes deep technical IP in high-frequency RF, mixed-signal, and optical transceiver verification. Concurrently, Raytek bolsters the group's specialised optical probe station capabilities and precision electro-optical test fixtures.

Ardentec: CPO landscape

Cu Pillar

RAYTEK

Cu/Ni/Au|

EIC Wafer

Probe Test

GS

TSV Reveal

RAYTEK

Stacked Die Flip Chip on Organic Substrate

fabrinet

EIC

PIC

СРО

Wafer

SiPh Wafer

спілишие

EIC on PIC

Stacked Die fabrinet

Source: Ardentec

RAYTEK|

Wafer Back

Grinding

PIC Wafer

Probe Test

Ardentec (3264 TT): 9 September 2026

RAYTEK

Water

Dicing

Chip on Wafer

Probe Test|

Wafer Stealth

Dicing

This vertical integration allows Ardentec to offer a complete, turnkey E/O testing flow in close lockstep with leading foundry silicon photonics ecosystems (such as TSMC's COUPE architecture) and US tier-1 hyperscalers. Because CPO wafer test times and technical entry barriers are significantly higher than conventional CP, optical sorting commands substantial ASP premiums and structural margin accretion.

Although we estimate CPO-related testing to account for less than 5% of total revenue over 2026-27, Ardentec is firmly positioned to participate in this next-generation architectural transition. Establishing early technical leadership alongside group partners ensures Ardentec will not be left behind, likely solidifying a high-barrier moat as commercial CPO adoption increases over 2027-28E.

Ardentec: CPO landscape

Source: Ardentec

RAYTEK

Laser

Grooving

Daiwa

Advanced packaging shifts wafer testing from screening to missioncritical validation

Market Analysis

Structural shift in the IC testing industry

Reiterating the key message in our Taiwan Testing Interface Initiation: paradigm shift accelerated by AI report, we believe the semiconductor testing paradigm is shifting. In the multi-die and 2.5D/3D packaging era (eg, TSMC CoWoS, SoIC), wafer testing (chip probing, CP) is no longer a commoditised, post-fab defect screening step - it has evolved into a mission-critical gating process. We summarise the critical paradigm shift as follows:

• The known good die (KGD) imperative. Heterogeneous integration bundles highvalue compute dies with multiple high bandwidth memory (HBM) stacks. Packaging an untested or marginally defective die risks scrapping the entire multi-thousand-dollar subsystem. This zero-tolerance threshold elevates CP from sample-based checks to exhaustive, full-spec validation across extreme thermal ranges.
• Structural Test-Time Inflation (2-3x). High reticle-limit AI/HPC custom silicon, expanding power envelopes (>700W), and thousands of high-speed interconnect channels have doubled or tripled test times per wafer. Consequently, automated test equipment (ATE) fleet demand is decoupling from raw silicon unit growth, driven instead by compounding tester hours.
• Next-Gen CPO Frontier. Rapid silicon tape-out cadences demand high-density vertical probe cards (VPC) and micro-cantilever interfaces supporting parallel multi-site testing. Beyond electrical testing, the emergence of CPO and SiPh requires active sub-micron optical alignment and electro-optical (E/O) sorting, creating multi-year technical barriers and pricing premiums for early movers.

Market dynamics: testing outperforms packaging

According to Gartner (Semiconductor Assembly and Test Services, Worldwide, Sep 2025, Semiconductors and Electronics Team), total package and test market size is projected to increase from USD47.3bn to USD65.2bn over 2025-29E, representing an 8.4% CAGR over the period. Given that third-party market data typically blends packaging and testing into total OSAT, we granularly disaggregate historical revenue across major US and Taiwan vendors.

While consumer electronics endured a prolonged post-pandemic inventory correction over 2022-25, the emergence of AI/HPC workloads created a pronounced divergence across the backend: historical industry data indicates that the testing sub-segment delivered materially higher year-over-year revenue growth than packaging over 2023-25, propelled by multi-die KGD mandates and structural test-time inflation.

Global: OSAT market size and growth

Source: Gartner (Semiconductor Assembly and Test Services, Worldwide, Sep 2025, Semiconductors and Electronics Team)

Global: OSAT market share

Source: Gartner (OSAT Service Provider, April 2026, Kartikay Gulani)

Ardentec (3264 TT): 9 September 2026

Daiwa

Global OSAT: revenue growth by major US/TW players

Source: Companies

Note: Packaging and testing market size is estimated using the combined packaging and testing revenues of ASE,Amkor, Powertech, KYEC, Sigurd, Ardentec, Chipmos, and Greatek

Daiwa

Global OSAT: revenue breakdown by major US/TW players

Source: Companies

Note: revenue breakdown based on 2025 revenue

Advantage of pure-play testing

We think three reasons distinguish dedicated testing pure-plays from traditional integrated OSATs:

• Asset-light model and lean working capital mechanics. Integrated OSATs face substantial working capital exposure to expensive ABF substrates, precious metal bonding wires, and carrier materials. In contrast, pure-play testing carries virtually zero direct material inventory, insulating balance sheets from write-down risks. Furthermore, automated test equipment depreciation is concentrated directly within COGS, with capital intensity effectively moderated by customer-consigned tester allocations.
• Fleet flexibility and potential spillover orders. Unlike specialised packaging lines that require extensive physical retooling, standardised high-end ATE platforms exhibit exceptional fleet flexibility. Once test programs and interface hardware are qualified, testers can rapidly transition across diverse application domains - from premium mobile APs and automotive MCUs to complex custom ASICs - by swapping applicationspecific load boards and high-density probe cards. As tier-1 OSATs concentrate their tester fleets on merchant AI GPU allocations, mobile AP, 5G RF, and high-speed networking chipmakers face severe capacity displacement. We believe pure-play test houses could benefit from a dual growth driver: rising demand for high-margin AI/HPC programs and incremental mobile and networking orders redirected to underutilised legacy tester capacity. This dynamic could decisively shift commercial bargaining leverage to pure testers, expanding hourly billing rates and unlocking structural gross margin leverage.

Global OSAT: Capex intensity

Source: Bloomberg

Pure-play testers benefitting from AI demand and spillover orders

Ardentec (3264 TT): 9 September 2026

Ardentec (3264 TT): 9 September 2026

Daiwa

• IP neutrality and ecosystem balancing. North American hyperscalers designing proprietary custom silicon actively avoid monolithic vendor lock-in and potential IP conflicts within integrated supply chains. Pure-play testers provide a strictly neutral counterweight with uncompromised test cell isolation. Multi-story modular facilities deliver the physical segregation necessary to enforce proprietary security protocols and run dedicated engineering cells, allowing pure-play test houses to function as indispensable, IP-secure manufacturing partners across the advanced foundry ecosystem.

Multi-year revenue growth outlook fuelled by the Longtan fab ramp, AI mix upgrade, and pricing power

Ardentec (3264 TT): 9 September 2026

Financial analysis

Revenue growth in 2026-28E

We forecast Ardentec's top-line to enter a multi-year expansion cycle, accelerating from TWD14.0bn in 2025 to TWD19.5bn in 2026E (+39.0% YoY), TWD26.8bn in 2027E (+37.5% YoY), and reaching TWD34.4bn in 2028E (+28.2% YoY). This represents a 3-year revenue CAGR of +34.8% (2025-28E), driven by a powerful confluence of volume expansion and structural pricing power across both advanced and mature test fleets.

First, we believe the orderly floor-by-floor commissioning of the 7-story Longtan facility delivers a predictable volume baseline, with each fully loaded cleanroom floor contributing c.TWD150m per month (c.TWD450m+ quarterly) in incremental run-rate revenue. Beyond pure wafer throughput, we expect revenue quality to see a significant mix upgrade, as advanced wafer sorting for hyperscaler AI ASICs and complex HPC processors command an hourly billing rate of nearly double (95-100% premium) that of traditional automotive and industrial IC testing, fundamentally elevating revenue density per tester hour.

Furthermore, as Ardentec prioritises engineering bandwidth, cleanroom footprint, and tester allocations toward high-margin advanced CP, legacy and mature-node test capacity faces internal supply tightness. This self-induced capacity crowding shifts pricing leverage back to Ardentec, allowing the company to enact upward price adjustments across laggingnode test services and accelerating a broad-based, corporate-wide blended ASP expansion.

Ardentec: quarterly and annual P&L statements

Source: Company, Daiwa forecasts

Daiwa

Higher utilisation and legacy tester leverage support structural margin uplift

Ardentec (3264 TT): 9 September 2026

Daiwa

Gross margin inflection driven by UTR surge

We believe capacity utilisation rate serves as the single most critical determinant of Ardentec's gross margin trajectory. Over the coming quarters, we project a structural rebound in corporate-wide utilisation driven by 2 powerful operational forces.

First, the rapid ramp of the Longtan advanced testing fab-operating at an optimal 85-90% UTR ceiling-will represent a rapidly expanding proportion of total capacity, immediately enriching the blended margin profile. Second, incoming spillover orders from tier-1 communications and mobile AP clients are directly refilling legacy and mature testing lines. Because these mature tools are almost or already fully depreciated, incremental spillover revenue incurs virtually zero depreciation burden, generating exceptionally high operating leverage and outsized gross profit contribution, in our view.

Therefore, we estimate that this dual dynamic of high-end capacity scaling and fully amortised tool revitalisation will propel gross margins from 36.3% in 2025 to 42.3% in 2026E, 44.5% in 2027E and reach 45.0% in 2028E.

Source: Company, Daiwa forecasts

Earnings led by gross margin amid subdued operating leverage

We believe that Ardentec's earnings inflection is predominantly a story of gross margin and operating leverage rather than structural opex dilution. The high-fixed-cost nature of the wafer testing business-governed by multi-billion-dollar ATE depreciation and cleanroom overhead-is heavily concentrated within Cost of Goods Sold (COGS), per management. Consequently, the powerful fixed-cost absorption resulting from Longtan's ramp and peer spillover orders directly fuels gross margin expansion, while operating leverage at the SG&A/opex level remains comparatively subdued.

Because high-end ASIC and electro-optical testing require tailored test program development, application-specific load board debugging and dedicated test engineering headcount for each CSP roadmap, we believe R&D and engineering talent function as quasi-variable expenses that scale in tandem with incremental floor additions. As a result, we project Ardentec's opex-to-sales ratio to remain relatively stable in the 9-10% corridor over 2026-28E.

Capex acceleration balanced by prudent financing and limited dilution

Ardentec: capex intensity

Source: Company, Daiwa forecasts

Ardentec (3264 TT): 9 September 2026

Daiwa

Source: Company, Daiwa forecasts

Balance sheet and cash flow

While management has not provided official guidance due to dynamic cleanroom construction milestones and equipment lead-time variations, we model an orderly deployment cadence of one cleanroom floor per quarter at the Longtan mega-facility. Under this baseline, we forecast total capital expenditures (capex) to step up aggressively to TWD14.5bn in 2026E and TWD18.5bn in 2027E to support facility buildout and early tool installations.

To fund this expansion phase, Ardentec intends to prioritise low-cost bank borrowings over issuing overseas or domestic convertible bonds (ECB/CB), deliberately avoiding equity dilution to maximise EPS accretion during the upcoming earnings supercycle. Concurrently, management plans to optimise capital allocation by pragmatically calibrating its historical cash dividend pay-out ratio. We estimate the pay-out ratio will moderate slightly from 70% to 50% to retain internal cash for high-return AI capacity. Meanwhile, we believe the company actively negotiates customer-consigned tester models for subsequent cleanroom floors. This is a framework that insulates the cost structure from severe, frontloaded depreciation burdens and channels capital directly into superior return on equity (ROE) growth.

Benefitting from disciplined financing, high asset turnover on advanced wafer sort lines and gross margin expansion, we project Ardentec's ROE to stage a structural recovery from the cyclical trough experienced during the 2023 automotive downturn, steadily increasing from 15.1% to 32.1% over 2025-2027E.

Ardentec: ROE trend

Source: Company, Daiwa forecasts

Initiating with a Buy (1) rating on expanding AI/HPC exposure and gross margin upside

Ardentec (3264 TT): 9 September 2026

Valuation and recommendation

Initiating coverage with a Buy (1) rating

Given the current structural mix transition from cyclical automotives towards high-margin AI/HPC custom ASICs, amplified gross margin and operating leverage from the Longtan ramp, and ROE inflection likely to surpass its 2022 historical peak of c.23% over 202628E, we initiate coverage of Ardentec with a Buy (1) rating and 12-month TP of TWD340, based on a target PER of 25.0x applied to our 4-quarter-forward EPS. Our target multiple of 25.0x is supported by a 48% EPS CAGR over 2025-28E (PEG of c.0.52x).

Historically, Ardentec traded within a compressed band of 10-25x forward PER due to its cyclical automotive and industrial exposure. While the stock has begun to re-rate alongside recent EPS upgrades, we view this multiple expansion as far from complete. In addition, we believe Ardentec still trades at a noticeable discount (14.9x PER on 2027E EPS) vs. leading AI testing peers (KYEC trading at 18.7x PER, while ASE at 26.4x), leaving ample room for multiple expansion as its pure-play test economics and earnings growth outpace the broader backend sector.

Ardentec: blended 12-month PER bands (past 3 years)

Source: Bloomberg

Peers' valuation

Source: Bloomberg, *Daiwa forecasts

Note: Share prices as of 9 Sep 2026

Ardentec: blended 12-month PBR bands (past 3 years)

Source: Daiwa forecasts

Daiwa

Risks to our call

1. Delays in capacity expansion (primary risk). Delays in Longtan cleanroom and equipment installations, or customer qualifications could disrupt the floor-by-floor ramp, deferring high-margin hyperscaler ASIC revenue and diluting near-term gross margin leverage.
2. Pricing pressure as a second-source supplier (secondary risk). Serving as a second-source supplier forces Ardentec to accept lower hourly rates than primary competitors. Furthermore, non-AI clients demand annual price cuts, limiting gross margin recovery unless capacity utilisation remains exceptionally high.
3. Slow automotive and industrial recovery (secondary risk). Prolonged inventory adjustments in automotive and industrial markets continue to drag down IDM revenue share. Clients are placing short-term urgent orders rather than rebuilding long-term inventory, creating demand uncertainty for mature testing capacity.

Ardentec (3264 TT): 9 September 2026

Daiwa

Pure-play tester offering automotive expertise, AI exposure, and capacity flexibility

Appendix

Company introduction

Founded in 1999 and headquartered in Hsinchu, Ardentec is an independent semiconductor testing service provider. The company specialises in wafer testing (wafer sort) and final testing for memory, logic and mixed-signal integrated circuits. Its diverse portfolio addresses several sectors, including automotive electronics, 5G communications, storage and advanced AI/HPC ASICs.

Through strategic investments in Giga Solution and Raytek, Ardentec has also successfully expanded into RF testing and bumping capabilities. Its global customer base spans worldclass foundries, IDMs and fabless designers, such as MediaTek, Marvell, Texas Instruments, Infineon and NXP.

Ardentec's core competitive advantage lies in its early leadership in automotive semiconductor testing, underpinned by ISO 26262 certification and stringent reliability standards that support strong customer stickiness and order stability. As an independent, pure-play testing provider, Ardentec serves as a neutral strategic partner to leading fabless companies, offering foundry-grade engineering capabilities, dedicated capacity and greater commercial flexibility.

Its role extends beyond that of a conventional second-source supplier: by providing an independent alternative to increasingly consolidated foundry and OSAT ecosystems, Ardentec helps customers diversify supply-chain risk, secure critical testing capacity and avoid potential bottlenecks. Backed by its state-of-the-art Longtan facility dedicated to advanced AI ASIC testing and a global manufacturing footprint across Taiwan, Nanjing, South Korea and Singapore, Ardentec is well positioned as an indispensable testing partner for tier-1 and emerging semiconductor customers.

Shareholder structure

Ardentec's shareholder base is well diversified, with no single controlling shareholder. Dresdner Bank AG is the largest holder with an 8.36% stake, followed by Macronix International (7.33%) and Vanguard Group (4.66%). The register also includes long-term institutional investors such as BlackRock, Dimensional Fund Advisors, BNP Paribas and Taiwan's pension-related funds, providing a stable ownership structure and supporting governance transparency.

Ardentec: shareholder structure (as of 3 Sep 2026)

Source: Bloomberg, Company

Ardentec (3264 TT): 9 September 2026

Daiwa

Ardentec (3264 TT): 9 September 2026

Ardentec: foreign institutional ownership trend

Daiwa

ESG analysis

ESG risks

Note: Management score represents a company's ability to manage/benefit from certain ESG topics. The scores range from 1 to 3, with 1 being the strongest.

Update Date: 9 Sep 2026

Source: Daiwa, Company

Ardentec (3264 TT): 9 September 2026

Daiwa

Daiwa's Asia Pacific Research Directory

Ardentec (3264 TT): 9 September 2026

Daiwa

Daiwa's Offices

DAIWA INSTITUTE OF RESEARCH LTD

All statements in this report attributable to Gartner represent [Bank's/Issuer's/Client's] interpretation of data, research opinion or viewpoints published as part of a syndicated subscription service by Gartner , Inc., and have not been reviewed by Gartner . Each Gartner publication speaks as of its original publication date (and not as of the date of this [presentation/report]). The opinions expressed in Gartner publications are not representations of fact, and are subject to change without notice.

Ardentec (3264 TT): 9 September 2026

Daiwa