video_OCP2026_Ligent_NPO角色_20261015

Yeah, thank you, Eric. Uh good afternoon, everyone. Um I'm Jimmy Moon and uh Dr. Weiping Huang uh cannot attend the meeting, so I deliver the talk on his behalf. So, today uh we will discuss that uh MPO uh is uh is not a bridge uh from uh um pluggable to CPO, uh rather is to involved into two distinct paths. One is uh switch uh when the network IO for switch, the other is uh uh compute IO for uh scale up. Then we will show in two uh our uh demonstrations on with uh One is for network, another is for scale up. So, why optics is moving uh closer to ASIC? As we all know that uh um the PCB uh channel uh that the length of a PCB channel is get increasingly expensive uh regarding uh the equalization power, signal integrity, thermal, and uh and the serviceability. So, the pluggable uh of course can accommodate the longest PCB uh trace with uh um with additional power, and uh CPO can shorten uh the PCB trace greatly uh with a trade-off like uh uh serviceability and also the the complex complicated integration. And the MPO is balanced in between, so that uh with uh uh separate uh detachable uh OE engine. So, the key question here is that uh uh in a system, where do you um where do you optical to the electrical to optical conversion uh sit in the system where the conversion happens. So, let us have a more closer look. Now, we see that the pluggable cost that many merits and uh regarding that the can accommodate the most of flex flexible um that the port and the CPU as provide the best the density and the lowest electrical uh rate. And the MPO uh that take the balance. So, the balance uh here if we uh check carefully that uh uh the balance that has its own merit. It's not merely a bridge and uh it has the the position in its value chain. So, let's uh see the two um it's distinct applications that the wise or uh switch uh MPO another is server uh is that the MPO. What's the main difference? Uh you you can tell that the from uh the page that the the in principle that the switch side MPO is moving the optical closer to the switch ASIC. That the is still that the uh network uh interface. And uh uh we still have to accommodate the network connectivity and uh then that the either consider the field uh maintenance. On the other hand for the uh uh server side MPO, the server side MPO in principle that the extend uh the uh electrical IO uh to the optical domain. So, that can over overcome should overcome the rate limit of copper uh that uh uh in scale up of fabric. And the for both that the applications, they share some common technology, but the other product probably have a different that requirement also can be different. So, the different the system role may lead to different requirement. Let's have a closer look of a both solutions. One is the switch side MPO, another the server side MPO. So, for switch side MPO, we that the we may focus on the standard network interface and also the the target reach is is 100 m to kilometer. We still require that the multi-vendor PMD interoperability and also that is a socket replaceable OE is preferred. On the other hand, for the XPU side MPO, that the low power that the energy per bit and the bandwidth density and also that we may care about the around accelerator, the package edge is density. So, that leads to different product the product definitions. One is the switch side, we may want to have like a high capacity detachable OE and for the computer MPO, that we may see the platform of like a a smaller OE distributed along the the XPU and other accelerators. So, of course, that >> [clears throat] >> in different applications, we will see that retiming play a critical role. For example, for the computer IO, as low power low latency is preferred, so we may see AI fabrics that the best the is that the we and and the the linear MPO is preferred. And on the other hand on the scale out or on the switch, I see because we have to still have to accommodate the interoperability and the to accommodate the the link margin, you we will see the half retained LRO at to be preferred that the the all or in other words that the retiming will play a role in in in for the for the switch for the for the network IO based that the the MPO. So, so for the optical side that we see many choices talking about the scale up. The scale up if we adjust the category group into two solution, one is for the short reach and low power. And the one is typical example is VICSO based and another is silicon photonic based. What's the key difference? So, I see that the inherently that the VICSO provide the the low power and the simple optical source packaging. And then this is can have the can have that very low cost potential. And then on the other hand for the silicon photonic based that the target reach can be can be up to the 100 m. And the signal value of course that is the dense CTWM and the architecture flexibility. And the so both sides that we see some of drawbacks that all limitations. For example, on the VICSO we have to consider the thermal reliability and on the silicon photonics we we see how to hot how can we integrate lasers or either external or integrated laser. So, likely there is no one single winner that we see that the different the platform may find a position in different applications. And uh for the network based MPO and the compute based MPO, we also see the product may diverge that for the network IO as we have mentioned that it's it's starting from the pluggable module that is 10 you can treat consider this is a move that the the optical from the front panel to the to near the socket MPO to the near the near the near the ASIC and socket the MPO. And as the technology evolves, we may see some higher density OE like 6.4T and 12.8. And also we see some optical IO up to the 12.8T. And for the computer IO because it's starting from uh uh the uh the the electrical IO that we see that the different like the technologies may appear like a micro LED or it's like a vicel and the distributed along that XPU uh area. And this the the the technology may evolve to the dense optical IO or to a different like uh the optics. So, uh then there is a several is a implementing choices that is number one is that for the for the light source. Where should we put the light source? And as many speakers already discussed that either you put the laser inside the uh the the module or you can put using the external laser. There's a drawbacks and uh and and merits are very uh is that is very is that this distinct uh for example for the for the LS is that although we avoid the external laser PM fiber connector pass, uh but there is uh for the uh thermal and also that uh for the manufacturing that is there is challenge there. And for the external laser since the laser source can be serviced separately and uh independent uh thermal control possible. And that we have to consider that we impact uh the front panel that uh allocation. And also that of in some cases, for example, in the in the uh in the computer IO, so you may have the front panel at all. So, the implementation uh choice that uh we what we should choose that uh it's different like uh the connector. How can we choose the connector? Here we we we cannot treat the connector as uh just uh like the common connector we used, rather is a electrical component and the critical interface. And uh there are two uh kind of uh platform or the connector type. One is LGA-based. Another is uh OpenCPX or Mazanine. That LGA that can provide very low profile and the short uh the electrical path and provide the high density uh around the ASIC parameter. And there we have to care about uh the challenge it it may face. For example, uh the compression and in few uh applications we was the long-term reliability. For the Mazanine, that uh it is is a standardized that uh is a lot of discussion and uh uh the supportive open system ecosystem. But there is a connector additional connector lens uh that we have to consider in the for the signal integrity and other stuff. And uh regarding that uh on the uh uh the packaging, uh we will see that the migration from a 2D uh packaging to 2.5D flip chip and uh to the RDL with the either TMV or TGV uh platform. And the ultimate uh is a platform. We see that is a 3D integration using the hybrid bonding or is a die-to-die integration. Uh So, for the current that the 1.6T that uh the most of solutions based on the 2D and uh the 3.2T, we see that the a flip chip may possible and the 6.4T uh the RDL and the TMV. Uh going forward at the for the 12.8T, we may see that the uh the 3D may require 3D or hybrid bonding that is to accommodate the even higher uh data rate. So, here I I show you that the uh the two uh is a is a product development happened in at Legend. One is the uh silicon photonics uh based the 3.2T. Uh we demoed this in CLE and the UCOC and this is also a platform for us to uh to the uh 6.4T. So, this is 32-channel uh 100G plane. And uh the across the 32 channel, the TDQ is around the 1.3 dB and the and the BR floor is the 10 e minus 9 to 10 e minus 12. That uh the typical power is 23 W. It's a it's a a typical uh is implementation for the network based that can support like a 500 m a range. And another is that the a Vixel uh based platform. Uh you you we compare to the previous uh uh solution, uh the power uh is significantly lower that for the 3.2T, we we for the measurement, we see the 4.5 W. And this can be uh you know can can think about that if we talk about the network okay MPO and and the compute MPO that this is a can be you know is a has the potential for the uh uh for the computer IO because the lowers have a very significant is a power reduction. So, I will wrap up my presentation in three uh takeaways that the number one is that we we saw that the MPO is not a bridge. It has its own value and it has its position at is a in in the architect system architecture. And the second is that the uh for design that is a MPO that needs a lots of considerations like uh what's the optical and the optical platform and what's the fiber uh what's the interface and how to choose the laser solution. And then how you package that the the product. The third one is that the we will see that the uh two uh clear that is uh evolution paths. One is the network based, another is compute uh based. And the the two the two paths may share uh the technology and but the product are not necessarily the same. Uh thank you.