產業_SEMICON2026矽光子論壇_Advantest逐字稿_20260831

場次：2026 SEMICON Taiwan 矽光子國際論壇（2026-08-31） 講者：李俊樑（Advantest Europe GmbH） 題目：Scaling Silicon Photonics and NPO/CPO Test for High-Volume Manufacturing

[00:00:00.00] Soitec, Tiro, and the time of this talk is scaling, silicon photonics, and NPO, TPO test, for high-level manufacturing. Sounds like we're staying with a theme here. Okay. Go ahead, please. Let's welcome all. [00:00:16.00] Hello. Good afternoon, everyone. So, thanks for hanging around until now. So, in a way, I think I'm in a very good position in this, today's session, because, after all the, [00:00:29.50] the speeches up to now, I feel like I'm in a position of giving you a summary from Advantest point of view of what we observe the testing business regarding [00:00:40.50] silicon photonics. Especially after all this session we discuss about the high volume manufacturing and the challenges of testing. So here we would like to give you our [00:00:52.50] perspectives on this market situation and how the optical engine topology [00:00:59.30] affecting testing and how do we proceed taking on these challenges what's the [00:01:08.00] topics we need to address and how the adventists address these topics. So first of all [00:01:17.02] When you look at this picture, I guess you guys have seen this multiple times in different formats, but they all look very similar. [00:01:28.02] Why? Because this is the consensus at the moment for silicon photonics. [00:01:33.02] As you can see, now the chance is to try to speed up in various ways, either scale out or scale in or scale up. [00:01:44.02] So the idea is you want to put the optical engine as close as possible to your either [00:01:51.46] GPU or your asset and try to bring things all together and make things faster. [00:01:57.78] So that's why you see that this picture over and over again and I'm also showing it here. [00:02:03.94] So now it's scale up, then scale up and even try to find alternatives other than silicon [00:02:12.46] There is also something in discussion. [00:02:15.46] So, in the future, not only the thing of photonics, [00:02:20.46] and even the structure, or the architect, or all things together, [00:02:24.46] we even heard about memory disparation. [00:02:28.46] So, things like a memory pool. [00:02:31.46] So, not only you work on the essence itself, but also the overall structure of it. [00:02:37.46] So all in all, as you can see, and you hear it is, multi-mortized, this today already, is high volume manufacturing. [00:02:48.96] The testing, in effect, is now getting more and more difficult and becoming a bottleneck of the whole chain. [00:02:59.46] So, as a traditional semiconductor AV vendor for the Advantest, in effect, we have to address the need from this market. [00:03:12.46] So, before we start on everything, I would like to do a small recap on what we are talking about today. [00:03:19.46] Even though you guys are already familiar with all this, [00:03:22.46] So this is the basic fundamental structure of an optical transceiver. [00:03:29.46] So basically you have a transmitter with maybe the sample here. [00:03:35.46] We have microarray modulators and each modulator is tuned to resonance at a certain frequency. [00:03:43.46] So for example here we have four. [00:03:45.46] So for we can deal with four different web lengths, [00:03:49.50] so which means you multiply the bandwidth by four. [00:03:53.06] So we can also, for seeing now the trend will be in the future, [00:03:57.12] you will need to deal with more web lengths. [00:03:59.90] And dealing with more web lengths, [00:04:01.46] that's also telling you if you want to do tasks, [00:04:05.24] they need to deal with more web lengths. [00:04:08.02] That would also impose a strong time [00:04:11.56] on the instrumentation, for example. [00:04:15.36] So, and if you look at what we are talking here, [00:04:19.52] then the modulators, of course, [00:04:21.30] they are in the optical part of it. [00:04:24.00] And then on top, the driver who is modulating [00:04:26.66] the electrical signals, [00:04:28.90] that will be the electrical part of it. [00:04:31.18] So, by these principles, you can see [00:04:34.64] what we need to deal with is the electrical IC [00:04:38.80] with the photonics IC on it. [00:04:41.32] So, even though in theory it's a simple concept, just EIC on top of PIC, you need to put them together. [00:04:53.32] But there will be many flavors of EIC-PIC version and how we do it. [00:04:59.32] So, for example, TSMC is a very famous COUPE. [00:05:04.32] So it simply bonds the EIC on top of PIC. [00:05:08.32] But this bonding, even with this simple bonding, it may be edge coupling or grating couplers. [00:05:16.32] So with edge coupling and the grating couplers, in the fact there will be two different flavors of testing. [00:05:26.32] For example, with edge coupling, it's very similar to the pure pick. [00:05:32.32] You can do it with single-sided probing. [00:05:36.32] But with grating coupler, when it's bound with the EIC, then in fact we need to use a double-sided [00:05:44.76] wafer-level electro-optical robot to do the test. So, depending on the technology you use to integrate [00:05:54.60] your EIC with your PIC, then you need to choose different testing strategies. [00:06:00.72] So now, I guess you guys have seen this over and over again today. [00:06:08.22] So it's insertion 1 to insertion 4 from different perspectives. [00:06:13.72] For the testing strategies, you will need to deal with different insertions with different [00:06:21.72] ways of probing. [00:06:24.72] And you also need to consider what you want to test at each insertion. [00:06:30.48] So for example, at the first insertion, insertion 1, you probably will do electrical and optical DC items. [00:06:39.20] DC for opticals is quite straightforward. It's about power measurement. [00:06:45.60] So for EIC part, you would have sort of optical DC part, you would also care about dark current. [00:06:52.60] So when you shut down the laser, you want to make sure the current consumption is really low. [00:06:57.60] And then when you work towards insertion tools and high insertion tools, [00:07:02.60] then you will start to think about more and more how you can make sure the optical is really talking to your electrical part, [00:07:10.60] and your modulation is really working. [00:07:13.60] So we can think of today you already see that every time we are talking about 200 gigahertz [00:07:19.60] it's being at 400 and getting higher and higher. [00:07:23.60] So we can think of that the challenge is really that when you go to higher insertions [00:07:28.60] in the fact the test complexity is really increasing dramatically. [00:07:33.60] However, you can also think about when you get only the device you catch the default [00:07:42.60] the faulty devices at high insurgents, in effect, the cost would be higher. [00:07:48.60] So the trend is to get a known good optical engine as early as possible. [00:07:54.60] So that's why it's doing the testing to a good coverage at insertion 1 and insertion 2 [00:08:03.60] is getting more and more atomic for testing of silicon photonic devices. [00:08:09.60] So, from our perspective, for all these insertions, what would be the common challenge that we never need to resolve? [00:08:21.60] So, what we see is first of all for optical probing, that today there is no standard way of doing alignment for optical coupling. [00:08:33.60] So it's still like the industry is still working on to find a way to do accurate, fast and stable [00:08:43.60] and most importantly repeatable so that you can deal with the HVM testing. [00:08:48.60] So and most importantly because we are so familiar with electrical probing [00:08:54.60] which has been established for so many years. [00:08:58.60] So people have certain level of expectation that for optical testing, even though it's complicated, it's difficult, but we want it to be, at the end, to be as simple, as repeatable, as good quality performance, the same as the vertical testing. That's the expectation. [00:09:17.60] And secondly, as I mentioned in two previous presentations, the optical package fiber connector [00:09:30.16] handling is also a topic. [00:09:32.48] Once you go to higher insertions, you need to deal with these fiber connectors. [00:09:38.72] In fact, there are still so many flavors in the market and there's no standard thing. [00:09:45.68] So you need to kind of work out not only the interface of it, but in the process, you also need to work out a way within the ecosystem [00:09:56.68] to kind of standardize it so that people from different perspectives accept that this would be the future way to go. [00:10:08.68] And finally, but not least, is the optical instrumentation. [00:10:14.68] So, remember we talked about that you need to work on pretty high speed signals and also need to deal with modulations. [00:10:23.68] And then today we already hear that the count of the optical channels increased dramatically. [00:10:31.68] So, you can think of if you at the moment only need one set of instruments in the very near future, [00:10:41.68] So if it just happened here, you may already need to double the amount of all the instruments [00:10:47.68] that you have now to test one device. [00:10:50.68] So the particle instrumentation is also a challenging thing that we are seeing now. [00:10:57.68] That today there's no really integrated standard. [00:11:03.68] It's all based on the REC and STAC solution. [00:11:07.68] So it's very easy to customize, but if you want to go into high-volume manufacturing, to duplicate the REC, it's not that straightforward. [00:11:18.68] So it's something we are seeing as challenges. [00:11:22.68] So, from now on, in fact, I'm going to follow the storyline as the insertions from 1 to 3, 4, and then how the challenges that we just talked about [00:11:36.68] we just talked about the probing, the connection, and the instrumentation, how do we resolve it. [00:11:45.08] So very first example is the V8 3K Titan test cell. This is for insertion one. [00:11:53.88] So what you can see here, first of all, is we have proven optical fiber alignment. [00:11:59.78] In effect, it's leveraging from industry famous CM300, [00:12:05.34] so it's active alignment, six taxes of freedom. [00:12:11.20] And then the broker paired with it is again [00:12:15.60] a very famous one, it's a TEL Precio prober, [00:12:18.98] it's a proven solution for electrical testing [00:12:23.64] for a very long time, so stable with the scan. [00:12:26.72] And then the optical rack, at the moment we have an instrument rack there [00:12:32.72] and what we are trying to do is standardize the configuration there [00:12:36.72] so the different customers can try to deploy the same set of the instrument inside [00:12:46.72] there's a way we try to push forward [00:12:50.72] and also in the rack the most important thing is the automated loss calibration [00:12:55.72] because you want to make sure the loss of the duration is not urgent to your engineers [00:13:01.72] and the other thing is for the REC, you also need to care about the laser safety [00:13:06.72] And finally, the software [00:13:10.72] Because you are talking with the test app by 93K [00:13:13.72] so of course you want to upgrade everything using the smart test app [00:13:17.72] so that is the software for controlling 93K [00:13:21.72] but now we also extended to control the optical instrument [00:13:25.72] to do the communication with the Triton software [00:13:29.72] so it's a single centralized software [00:13:33.72] center for all this. And of course [00:13:37.72] it fits the SECS/GEM, which is [00:13:41.72] standard, but in the fact it's a difficult [00:13:45.72] thing to get through it. [00:13:49.72] Okay, so then for insertions, the key thing you will hear is of course the stability. [00:13:57.72] Stability in the fact very much in optical testing world is all about the vibration control. [00:14:04.72] So you need to make sure that your environment is stable enough. [00:14:09.72] So that can give you a good stability result because the stability you measured with your system [00:14:16.72] system will at the end turn out to be the refusibility and reproducibility of the whole system [00:14:24.40] when you start doing the optical measurements so um here we have an example that we measured in [00:14:32.96] germany in the lincoln system that we have reached a plus minus 0.1 db stability [00:14:39.12] even across different web sweeps and that is thanks for 93K design. [00:14:48.12] So inside the test, we in fact, it's already engineered to minimize the vibration sources, [00:14:56.12] so in memory, very stable optical coupling throughout the test. [00:15:01.12] and also the dashboard interface, the DUT interface is also designed for minimizing the vibration [00:15:11.12] because it's like a floating interface [00:15:14.12] and the third point in effect is also important because the cooling design for 93K is water cooling [00:15:23.12] so there's no air to vibrate the systems [00:15:31.12] Okay, so one way is time-touch. So next, as the typical thinking of probing the wafer. [00:15:41.12] So of course, when you think about probing a wafer, the other thing you will think about is that it's also possible to use protons to do the same thing. [00:15:52.12] So on this topic, we are also working with our business partners on solutions. [00:15:58.12] So in 2024, we have already published a paper together with Jenoptik and also IELA Labs in SWTest. [00:16:15.12] It's about integration with the Jenoptik UFO protocol. [00:16:21.12] It's a passive alignment. It's a proof of concept. [00:16:25.12] And then in 2025 last year, we again have a joint paper with Jenoptik and Marvell [00:16:35.12] So proof of concept using again UFO, Probecom, it's a passive alignment [00:16:42.12] but it's proof that it can be ready for HVM automation [00:16:48.12] And then this year, last year and this year in FX, we also have a proof of concept paper together with TechnoProbe [00:17:01.12] and this is an active alignment probe card. [00:17:05.12] So this one has the 3D, 3D dimensional freedom and we co-worked this paper with Marvell and TechnoProbe. [00:17:17.12] And today, so 2026 this year, so we are also planning another paper. [00:17:25.12] So it's also an active alignment for edge coupler and it's also six degrees of freedom. [00:17:33.12] And here for an example, the voice this year. [00:17:37.12] So voice is a user's forum posted by Advantest. [00:17:42.12] the paper we have shown that it's able to reach plus minus 0.3 dB for stability. [00:17:53.12] So after insertion 1, then it comes to insertion 2. [00:17:56.12] So I think I also owe Andre a smile because here we can show the final back picture [00:18:06.12] even though we are working closely on projects. [00:18:09.12] So for double-sided wafer level or optical electrical probing, as discussed in previous sessions, [00:18:21.12] the wafer warp edge is an important factor and also the FU alignment is a key challenge. [00:18:29.12] So we work with innovators for the AT integration and in fact we are targeting the HVM qualification [00:18:41.44] made next year. [00:18:44.44] And the next one is about the die level testing. [00:18:47.80] So for development testing, we published a paper with MPI, so the texture system is MPI-DT650 [00:18:59.80] and it's also targeting the qualification for the beginning of next year [00:19:07.80] We already published a paper this year together with Marvell and MPI [00:19:16.80] using a dilable system that is DT650 with magnetic 3K [00:19:24.80] to prove that we can also work on insertion 3 for HVM protection [00:19:31.80] and you can see here as an example the stability of the system is able to reach the level of 0.1 dB [00:19:48.60] okay so then the next one in the fact is about the socket based final test so it's getting into the [00:19:57.08] domain of incident 4. So at this point we can see that optical domain the [00:20:06.68] straightforward thinking would be doing the optical loopback to do the test and [00:20:12.84] for the electrical domain you can think of that you relate on because now for [00:20:18.86] CPU the ASICS is there so you can use ASICS to do the loopback test that you [00:20:25.76] let the ASIC to deal with the high-speed digital signals which can [00:20:33.88] require like more than 400 bits per second. So if you want to find an 8D [00:20:40.70] equipment able to handle it, it could be really challenging and an expensive thing. [00:20:46.40] So let the ASIC take over the loopback part of the testing is also a way to go. [00:20:55.76] So the NPO and CPO packaging test. [00:21:04.52] So last year, Marvell Taiwan, Andrew showed this picture. [00:21:13.84] So you can see the connectors, they are still in the wide-west area. [00:21:19.56] So there is no standardized detachable PIC connector. [00:21:24.16] We still need to deal with the challenges on how to deal with all these different flavors of things. [00:21:30.16] And you also need to think that for optical engine, for NPO, it's one connector on one side, [00:21:38.16] but for CPO, it would be N connectors on multiple sides. [00:21:43.16] So how do you deal with these different scenarios? [00:21:48.16] So how we have worked out is a proof of concept that we published last year. [00:21:57.16] So it's something we call optical load board. [00:22:03.16] So we can see it here. [00:22:06.16] So with the optical load board, we basically let the optical load board handle the connectors attaching to the device. [00:22:21.16] So this is a picture of the thing. So basically this is a really... [00:22:29.16] I saw it in person in the face a few years ago. [00:22:37.16] So it's like when you press it down then the gray part on the picture will automatically lock the connector to the device. [00:22:47.16] mating the optical connectors. So that's what we have done with the packaging test. [00:22:58.76] So now if we look at the key aspects of optical measurement equipment, what do we need to resolve? [00:23:07.04] First of all, we need to select the instrument and components and work with the suppliers [00:23:14.20] because as we are discussing up to now the requirement of performance of [00:23:20.44] optical instrument is getting higher and higher and also the density of it. [00:23:26.70] So at the moment we are always working with optical instrument rack so it's like [00:23:33.08] we need generic rack design and considering the building laser safety [00:23:39.64] and make it certificated and also need to make it really flexible for configurations. [00:23:48.64] And since we are working with ATE systems, so people are expecting that controlling the optical rank, [00:23:55.64] optical instrument should be centralized within the software. [00:23:59.64] So we also provided what we call optical control library. [00:24:03.64] So basically it is flexible, easy to use. [00:24:07.64] You don't need to develop your own control library, so you just use SmartSA and we have those programming tips for you. [00:24:19.64] So, over here, even so, with the REC, you will still reach a final net. [00:24:28.64] Because look at the picture, there is a currency from IRLAPS which is called Vibrant. [00:24:32.64] you have so many optical engines to deal with and if you want to test them then [00:24:37.68] you will need to have these many racks to work with them [00:24:45.12] so what the industry is expecting in effect first of all you will need high [00:24:51.12] power laser so that we can deal with more channels and also the instrument we [00:24:57.30] need to be more, the density needs to be higher, and then it will be even better that we can [00:25:03.96] combine multiple functionalities into one instrument. [00:25:08.60] And last one, probably is the expectation from the market is that because we are ATE vendors, [00:25:15.34] so people are expecting the ATE instrument to be integrated inside the ATE system. [00:25:22.34] So if we look at overall, so this would be the attributes of the universal measurement instrument. [00:25:29.34] So we need to have a multi-function, high throughput, and be able to deal with different fiber connections, [00:25:36.34] and provide flexible signal routing, and most importantly, have the building, calibration, and diagnostic functionalities. [00:25:46.34] And last but not least, since now everything is within one system, so you would also expect the specification is published as the system level specification. [00:25:58.58] So, since we are ahead of time, my key takeaways for the presentation today is what we see as an ATE vendor is that the high volume manufacturing testing is still a key challenge for the silicon photonics devices. [00:26:22.20] As we talked about today, as you can see in the presentation, we are working in the ecosystem. [00:26:29.20] So no one can single-handedly resolve all these challenges. [00:26:33.20] So we need to work with business partners, with the innovators to work on solutions for the market, for the industry. [00:26:42.20] And Advantest, we are committed to driving ecosystem innovation and cooperation. [00:26:49.20] so that's close of my presentation